| Message ID | 20180511141037.25250-2-nsekhar@ti.com (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
On 05/11/2018 09:10 AM, Sekhar Nori wrote: > PLL2 SYSCLK1 on DM646x is connected to DDR2 PHY and cannot > be disabled. Mark it so to prevent unused clock disable > infrastructure from disabling it. > > Signed-off-by: Sekhar Nori <nsekhar@ti.com> > --- > drivers/clk/davinci/pll-dm646x.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/davinci/pll-dm646x.c b/drivers/clk/davinci/pll-dm646x.c > index eb96dd72b6b7..5bdf1cb5fda8 100644 > --- a/drivers/clk/davinci/pll-dm646x.c > +++ b/drivers/clk/davinci/pll-dm646x.c > @@ -72,7 +72,7 @@ static const struct davinci_pll_clk_info dm646x_pll2_info = { > .flags = 0, > }; > > -SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, 0); > +SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, SYSCLK_ALWAYS_ENABLED); > > int dm646x_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) > { > Reviewed-by: David Lechner <david@lechnology.com> -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 05/11/2018 09:10 AM, Sekhar Nori wrote: > PLL2 SYSCLK1 on DM646x is connected to DDR2 PHY and cannot > be disabled. Mark it so to prevent unused clock disable > infrastructure from disabling it. > > Signed-off-by: Sekhar Nori <nsekhar@ti.com> > --- > drivers/clk/davinci/pll-dm646x.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/davinci/pll-dm646x.c b/drivers/clk/davinci/pll-dm646x.c > index eb96dd72b6b7..5bdf1cb5fda8 100644 > --- a/drivers/clk/davinci/pll-dm646x.c > +++ b/drivers/clk/davinci/pll-dm646x.c > @@ -72,7 +72,7 @@ static const struct davinci_pll_clk_info dm646x_pll2_info = { > .flags = 0, > }; > > -SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, 0); > +SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, SYSCLK_ALWAYS_ENABLED); > > int dm646x_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) > { > FYI, this only applies on top of "clk: davinci: pll: allow dev == NULL". Not sure if that was intentional. -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Sunday 13 May 2018 02:50 AM, David Lechner wrote: > On 05/11/2018 09:10 AM, Sekhar Nori wrote: >> PLL2 SYSCLK1 on DM646x is connected to DDR2 PHY and cannot >> be disabled. Mark it so to prevent unused clock disable >> infrastructure from disabling it. >> >> Signed-off-by: Sekhar Nori <nsekhar@ti.com> >> --- >> drivers/clk/davinci/pll-dm646x.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/clk/davinci/pll-dm646x.c >> b/drivers/clk/davinci/pll-dm646x.c >> index eb96dd72b6b7..5bdf1cb5fda8 100644 >> --- a/drivers/clk/davinci/pll-dm646x.c >> +++ b/drivers/clk/davinci/pll-dm646x.c >> @@ -72,7 +72,7 @@ static const struct davinci_pll_clk_info >> dm646x_pll2_info = { >> .flags = 0, >> }; >> -SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, 0); >> +SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, SYSCLK_ALWAYS_ENABLED); >> int dm646x_pll2_init(struct device *dev, void __iomem *base, >> struct regmap *cfgchip) >> { >> > > FYI, this only applies on top of "clk: davinci: pll: allow dev == NULL". > Not sure if that was intentional. Not actually. I will resend the series as it applies to v4.17-rc1. Thanks, Sekhar -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/clk/davinci/pll-dm646x.c b/drivers/clk/davinci/pll-dm646x.c index eb96dd72b6b7..5bdf1cb5fda8 100644 --- a/drivers/clk/davinci/pll-dm646x.c +++ b/drivers/clk/davinci/pll-dm646x.c @@ -72,7 +72,7 @@ static const struct davinci_pll_clk_info dm646x_pll2_info = { .flags = 0, }; -SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, 0); +SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, SYSCLK_ALWAYS_ENABLED); int dm646x_pll2_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) {
PLL2 SYSCLK1 on DM646x is connected to DDR2 PHY and cannot be disabled. Mark it so to prevent unused clock disable infrastructure from disabling it. Signed-off-by: Sekhar Nori <nsekhar@ti.com> --- drivers/clk/davinci/pll-dm646x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)