diff mbox

[14/22] drm/i915/icl: WaDisableImprovedTdlClkGating

Message ID 1525814984-20039-15-git-send-email-oscar.mateo@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

oscar.mateo@intel.com May 8, 2018, 9:29 p.m. UTC
Revert to the legacy implementation.

v2: GEN7_ROW_CHICKEN2 is masked
v3:
  - Rebased
  - Renamed to Wa_2006611047
  - A0 and B0 only
v4:
  - Add spaces around '<<' (and fix the surrounding code as well)
  - Mark the WA as pre-prod
v5: Rebased on top of the WA refactoring
v6: Added References (Mika)
v7: Fixed in B0

References: HSDES#2006611047
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h          | 5 +++--
 drivers/gpu/drm/i915/intel_workarounds.c | 7 +++++++
 2 files changed, 10 insertions(+), 2 deletions(-)

Comments

Mika Kuoppala May 16, 2018, 11:05 a.m. UTC | #1
Oscar Mateo <oscar.mateo@intel.com> writes:

> Revert to the legacy implementation.
>
> v2: GEN7_ROW_CHICKEN2 is masked
> v3:
>   - Rebased
>   - Renamed to Wa_2006611047
>   - A0 and B0 only
> v4:
>   - Add spaces around '<<' (and fix the surrounding code as well)
>   - Mark the WA as pre-prod
> v5: Rebased on top of the WA refactoring
> v6: Added References (Mika)
> v7: Fixed in B0

Could you recheck from bspec?
I read it like we need this for all

-Mika

>
> References: HSDES#2006611047
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h          | 5 +++--
>  drivers/gpu/drm/i915/intel_workarounds.c | 7 +++++++
>  2 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 1449178..7f6f328 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8319,8 +8319,9 @@ enum {
>  
>  #define GEN7_ROW_CHICKEN2		_MMIO(0xe4f4)
>  #define GEN7_ROW_CHICKEN2_GT2		_MMIO(0xf4f4)
> -#define   DOP_CLOCK_GATING_DISABLE	(1<<0)
> -#define   PUSH_CONSTANT_DEREF_DISABLE	(1<<8)
> +#define   DOP_CLOCK_GATING_DISABLE	(1 << 0)
> +#define   PUSH_CONSTANT_DEREF_DISABLE	(1 << 8)
> +#define   GEN11_TDL_CLOCK_GATING_FIX_DISABLE	(1 << 1)
>  
>  #define HSW_ROW_CHICKEN3		_MMIO(0xe49c)
>  #define  HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE    (1 << 6)
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index 5eec4ce..3913b6a 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -459,6 +459,13 @@ static int icl_ctx_workarounds_init(struct drm_i915_private *dev_priv)
>  	 */
>  	WA_SET_BIT_MASKED(ICL_HDC_MODE, HDC_FORCE_NON_COHERENT);
>  
> +	/* Wa_2006611047:icl (pre-prod)
> +	 * Formerly known as WaDisableImprovedTdlClkGating
> +	 */
> +	if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_A0))
> +		WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
> +				  GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
> +
>  	return 0;
>  }
>  
> -- 
> 1.9.1
oscar.mateo@intel.com May 16, 2018, 7:41 p.m. UTC | #2
On 05/16/2018 04:05 AM, Mika Kuoppala wrote:
> Oscar Mateo <oscar.mateo@intel.com> writes:
>
>> Revert to the legacy implementation.
>>
>> v2: GEN7_ROW_CHICKEN2 is masked
>> v3:
>>    - Rebased
>>    - Renamed to Wa_2006611047
>>    - A0 and B0 only
>> v4:
>>    - Add spaces around '<<' (and fix the surrounding code as well)
>>    - Mark the WA as pre-prod
>> v5: Rebased on top of the WA refactoring
>> v6: Added References (Mika)
>> v7: Fixed in B0
> Could you recheck from bspec?
> I read it like we need this for all

I was going by the HSD (#2006611047), which says this was fixed in B0...

> -Mika
>
>> References: HSDES#2006611047
>> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
>> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_reg.h          | 5 +++--
>>   drivers/gpu/drm/i915/intel_workarounds.c | 7 +++++++
>>   2 files changed, 10 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index 1449178..7f6f328 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -8319,8 +8319,9 @@ enum {
>>   
>>   #define GEN7_ROW_CHICKEN2		_MMIO(0xe4f4)
>>   #define GEN7_ROW_CHICKEN2_GT2		_MMIO(0xf4f4)
>> -#define   DOP_CLOCK_GATING_DISABLE	(1<<0)
>> -#define   PUSH_CONSTANT_DEREF_DISABLE	(1<<8)
>> +#define   DOP_CLOCK_GATING_DISABLE	(1 << 0)
>> +#define   PUSH_CONSTANT_DEREF_DISABLE	(1 << 8)
>> +#define   GEN11_TDL_CLOCK_GATING_FIX_DISABLE	(1 << 1)
>>   
>>   #define HSW_ROW_CHICKEN3		_MMIO(0xe49c)
>>   #define  HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE    (1 << 6)
>> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
>> index 5eec4ce..3913b6a 100644
>> --- a/drivers/gpu/drm/i915/intel_workarounds.c
>> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
>> @@ -459,6 +459,13 @@ static int icl_ctx_workarounds_init(struct drm_i915_private *dev_priv)
>>   	 */
>>   	WA_SET_BIT_MASKED(ICL_HDC_MODE, HDC_FORCE_NON_COHERENT);
>>   
>> +	/* Wa_2006611047:icl (pre-prod)
>> +	 * Formerly known as WaDisableImprovedTdlClkGating
>> +	 */
>> +	if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_A0))
>> +		WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
>> +				  GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
>> +
>>   	return 0;
>>   }
>>   
>> -- 
>> 1.9.1
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1449178..7f6f328 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8319,8 +8319,9 @@  enum {
 
 #define GEN7_ROW_CHICKEN2		_MMIO(0xe4f4)
 #define GEN7_ROW_CHICKEN2_GT2		_MMIO(0xf4f4)
-#define   DOP_CLOCK_GATING_DISABLE	(1<<0)
-#define   PUSH_CONSTANT_DEREF_DISABLE	(1<<8)
+#define   DOP_CLOCK_GATING_DISABLE	(1 << 0)
+#define   PUSH_CONSTANT_DEREF_DISABLE	(1 << 8)
+#define   GEN11_TDL_CLOCK_GATING_FIX_DISABLE	(1 << 1)
 
 #define HSW_ROW_CHICKEN3		_MMIO(0xe49c)
 #define  HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE    (1 << 6)
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index 5eec4ce..3913b6a 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -459,6 +459,13 @@  static int icl_ctx_workarounds_init(struct drm_i915_private *dev_priv)
 	 */
 	WA_SET_BIT_MASKED(ICL_HDC_MODE, HDC_FORCE_NON_COHERENT);
 
+	/* Wa_2006611047:icl (pre-prod)
+	 * Formerly known as WaDisableImprovedTdlClkGating
+	 */
+	if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_A0))
+		WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
+				  GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
+
 	return 0;
 }