| Message ID | 20180621155830.11311-2-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Jun 21, 2018 at 06:58:30PM +0300, Imre Deak wrote: > After the previous patch we don't need to get an explicit AUX power > reference for PSR functionality, since we hold now an AUX reference > whenever the main link is active on any DP ports. > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/intel_display.h | 1 - > drivers/gpu/drm/i915/intel_psr.c | 41 --------------------------------- > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 --- > 3 files changed, 45 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h > index dfb02da73ac8..29501bf368b2 100644 > --- a/drivers/gpu/drm/i915/intel_display.h > +++ b/drivers/gpu/drm/i915/intel_display.h > @@ -198,7 +198,6 @@ enum intel_display_power_domain { > POWER_DOMAIN_AUX_D, > POWER_DOMAIN_AUX_E, > POWER_DOMAIN_AUX_F, > - POWER_DOMAIN_AUX_IO_A, > POWER_DOMAIN_GMBUS, > POWER_DOMAIN_MODESET, > POWER_DOMAIN_GT_IRQ, > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > index d4cd19fea148..eecdd8b5b5e0 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -56,43 +56,6 @@ > #include "intel_drv.h" > #include "i915_drv.h" > > -static inline enum intel_display_power_domain > -psr_aux_domain(struct intel_dp *intel_dp) > -{ > - /* CNL HW requires corresponding AUX IOs to be powered up for PSR. > - * However, for non-A AUX ports the corresponding non-EDP transcoders > - * would have already enabled power well 2 and DC_OFF. This means we can > - * acquire a wider POWER_DOMAIN_AUX_{B,C,D,F} reference instead of a > - * specific AUX_IO reference without powering up any extra wells. > - * Note that PSR is enabled only on Port A even though this function > - * returns the correct domain for other ports too. > - */ > - return intel_dp->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A : > - intel_dp->aux_power_domain; Hmm. Isn't this going to prevent DC5 during PSR? > -} > - > -static void psr_aux_io_power_get(struct intel_dp *intel_dp) > -{ > - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); > - struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); > - > - if (INTEL_GEN(dev_priv) < 10) > - return; > - > - intel_display_power_get(dev_priv, psr_aux_domain(intel_dp)); > -} > - > -static void psr_aux_io_power_put(struct intel_dp *intel_dp) > -{ > - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); > - struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); > - > - if (INTEL_GEN(dev_priv) < 10) > - return; > - > - intel_display_power_put(dev_priv, psr_aux_domain(intel_dp)); > -} > - > void intel_psr_irq_control(struct drm_i915_private *dev_priv, bool debug) > { > u32 debug_mask, mask; > @@ -595,8 +558,6 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp, > struct drm_i915_private *dev_priv = to_i915(dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > > - psr_aux_io_power_get(intel_dp); > - > /* Only HSW and BDW have PSR AUX registers that need to be setup. SKL+ > * use hardcoded values PSR AUX transactions > */ > @@ -717,8 +678,6 @@ static void hsw_psr_disable(struct intel_dp *intel_dp, > else > WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); > } > - > - psr_aux_io_power_put(intel_dp); > } > > /** > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index de3a81034f77..58a8f07eafa4 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -132,8 +132,6 @@ intel_display_power_domain_str(enum intel_display_power_domain domain) > return "AUX_E"; > case POWER_DOMAIN_AUX_F: > return "AUX_F"; > - case POWER_DOMAIN_AUX_IO_A: > - return "AUX_IO_A"; > case POWER_DOMAIN_GMBUS: > return "GMBUS"; > case POWER_DOMAIN_INIT: > @@ -1872,7 +1870,6 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, > BIT_ULL(POWER_DOMAIN_INIT)) > #define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \ > BIT_ULL(POWER_DOMAIN_AUX_A) | \ > - BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ > BIT_ULL(POWER_DOMAIN_INIT)) > #define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \ > BIT_ULL(POWER_DOMAIN_AUX_B) | \ > -- > 2.13.2
On Thu, Jun 21, 2018 at 07:13:51PM +0300, Ville Syrjälä wrote: > On Thu, Jun 21, 2018 at 06:58:30PM +0300, Imre Deak wrote: > > After the previous patch we don't need to get an explicit AUX power > > reference for PSR functionality, since we hold now an AUX reference > > whenever the main link is active on any DP ports. > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > > Signed-off-by: Imre Deak <imre.deak@intel.com> > > --- > > drivers/gpu/drm/i915/intel_display.h | 1 - > > drivers/gpu/drm/i915/intel_psr.c | 41 --------------------------------- > > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 --- > > 3 files changed, 45 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h > > index dfb02da73ac8..29501bf368b2 100644 > > --- a/drivers/gpu/drm/i915/intel_display.h > > +++ b/drivers/gpu/drm/i915/intel_display.h > > @@ -198,7 +198,6 @@ enum intel_display_power_domain { > > POWER_DOMAIN_AUX_D, > > POWER_DOMAIN_AUX_E, > > POWER_DOMAIN_AUX_F, > > - POWER_DOMAIN_AUX_IO_A, > > POWER_DOMAIN_GMBUS, > > POWER_DOMAIN_MODESET, > > POWER_DOMAIN_GT_IRQ, > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > > index d4cd19fea148..eecdd8b5b5e0 100644 > > --- a/drivers/gpu/drm/i915/intel_psr.c > > +++ b/drivers/gpu/drm/i915/intel_psr.c > > @@ -56,43 +56,6 @@ > > #include "intel_drv.h" > > #include "i915_drv.h" > > > > -static inline enum intel_display_power_domain > > -psr_aux_domain(struct intel_dp *intel_dp) > > -{ > > - /* CNL HW requires corresponding AUX IOs to be powered up for PSR. > > - * However, for non-A AUX ports the corresponding non-EDP transcoders > > - * would have already enabled power well 2 and DC_OFF. This means we can > > - * acquire a wider POWER_DOMAIN_AUX_{B,C,D,F} reference instead of a > > - * specific AUX_IO reference without powering up any extra wells. > > - * Note that PSR is enabled only on Port A even though this function > > - * returns the correct domain for other ports too. > > - */ > > - return intel_dp->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A : > > - intel_dp->aux_power_domain; > > Hmm. Isn't this going to prevent DC5 during PSR? Yep, it would. So we still need a separate AUX_IO domain which we would take during encoder enabling, whereas the AUX domain - which prevents DC states - would be used only for AUX transfers. > > > -} > > - > > -static void psr_aux_io_power_get(struct intel_dp *intel_dp) > > -{ > > - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); > > - struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); > > - > > - if (INTEL_GEN(dev_priv) < 10) > > - return; > > - > > - intel_display_power_get(dev_priv, psr_aux_domain(intel_dp)); > > -} > > - > > -static void psr_aux_io_power_put(struct intel_dp *intel_dp) > > -{ > > - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); > > - struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); > > - > > - if (INTEL_GEN(dev_priv) < 10) > > - return; > > - > > - intel_display_power_put(dev_priv, psr_aux_domain(intel_dp)); > > -} > > - > > void intel_psr_irq_control(struct drm_i915_private *dev_priv, bool debug) > > { > > u32 debug_mask, mask; > > @@ -595,8 +558,6 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp, > > struct drm_i915_private *dev_priv = to_i915(dev); > > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > > > > - psr_aux_io_power_get(intel_dp); > > - > > /* Only HSW and BDW have PSR AUX registers that need to be setup. SKL+ > > * use hardcoded values PSR AUX transactions > > */ > > @@ -717,8 +678,6 @@ static void hsw_psr_disable(struct intel_dp *intel_dp, > > else > > WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); > > } > > - > > - psr_aux_io_power_put(intel_dp); > > } > > > > /** > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > > index de3a81034f77..58a8f07eafa4 100644 > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > > @@ -132,8 +132,6 @@ intel_display_power_domain_str(enum intel_display_power_domain domain) > > return "AUX_E"; > > case POWER_DOMAIN_AUX_F: > > return "AUX_F"; > > - case POWER_DOMAIN_AUX_IO_A: > > - return "AUX_IO_A"; > > case POWER_DOMAIN_GMBUS: > > return "GMBUS"; > > case POWER_DOMAIN_INIT: > > @@ -1872,7 +1870,6 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, > > BIT_ULL(POWER_DOMAIN_INIT)) > > #define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \ > > BIT_ULL(POWER_DOMAIN_AUX_A) | \ > > - BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ > > BIT_ULL(POWER_DOMAIN_INIT)) > > #define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \ > > BIT_ULL(POWER_DOMAIN_AUX_B) | \ > > -- > > 2.13.2 > > -- > Ville Syrjälä > Intel
diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h index dfb02da73ac8..29501bf368b2 100644 --- a/drivers/gpu/drm/i915/intel_display.h +++ b/drivers/gpu/drm/i915/intel_display.h @@ -198,7 +198,6 @@ enum intel_display_power_domain { POWER_DOMAIN_AUX_D, POWER_DOMAIN_AUX_E, POWER_DOMAIN_AUX_F, - POWER_DOMAIN_AUX_IO_A, POWER_DOMAIN_GMBUS, POWER_DOMAIN_MODESET, POWER_DOMAIN_GT_IRQ, diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index d4cd19fea148..eecdd8b5b5e0 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -56,43 +56,6 @@ #include "intel_drv.h" #include "i915_drv.h" -static inline enum intel_display_power_domain -psr_aux_domain(struct intel_dp *intel_dp) -{ - /* CNL HW requires corresponding AUX IOs to be powered up for PSR. - * However, for non-A AUX ports the corresponding non-EDP transcoders - * would have already enabled power well 2 and DC_OFF. This means we can - * acquire a wider POWER_DOMAIN_AUX_{B,C,D,F} reference instead of a - * specific AUX_IO reference without powering up any extra wells. - * Note that PSR is enabled only on Port A even though this function - * returns the correct domain for other ports too. - */ - return intel_dp->aux_ch == AUX_CH_A ? POWER_DOMAIN_AUX_IO_A : - intel_dp->aux_power_domain; -} - -static void psr_aux_io_power_get(struct intel_dp *intel_dp) -{ - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); - struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); - - if (INTEL_GEN(dev_priv) < 10) - return; - - intel_display_power_get(dev_priv, psr_aux_domain(intel_dp)); -} - -static void psr_aux_io_power_put(struct intel_dp *intel_dp) -{ - struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); - struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); - - if (INTEL_GEN(dev_priv) < 10) - return; - - intel_display_power_put(dev_priv, psr_aux_domain(intel_dp)); -} - void intel_psr_irq_control(struct drm_i915_private *dev_priv, bool debug) { u32 debug_mask, mask; @@ -595,8 +558,6 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp, struct drm_i915_private *dev_priv = to_i915(dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - psr_aux_io_power_get(intel_dp); - /* Only HSW and BDW have PSR AUX registers that need to be setup. SKL+ * use hardcoded values PSR AUX transactions */ @@ -717,8 +678,6 @@ static void hsw_psr_disable(struct intel_dp *intel_dp, else WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE); } - - psr_aux_io_power_put(intel_dp); } /** diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index de3a81034f77..58a8f07eafa4 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -132,8 +132,6 @@ intel_display_power_domain_str(enum intel_display_power_domain domain) return "AUX_E"; case POWER_DOMAIN_AUX_F: return "AUX_F"; - case POWER_DOMAIN_AUX_IO_A: - return "AUX_IO_A"; case POWER_DOMAIN_GMBUS: return "GMBUS"; case POWER_DOMAIN_INIT: @@ -1872,7 +1870,6 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, BIT_ULL(POWER_DOMAIN_INIT)) #define CNL_DISPLAY_AUX_A_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_A) | \ - BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ BIT_ULL(POWER_DOMAIN_INIT)) #define CNL_DISPLAY_AUX_B_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_B) | \
After the previous patch we don't need to get an explicit AUX power reference for PSR functionality, since we hold now an AUX reference whenever the main link is active on any DP ports. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_display.h | 1 - drivers/gpu/drm/i915/intel_psr.c | 41 --------------------------------- drivers/gpu/drm/i915/intel_runtime_pm.c | 3 --- 3 files changed, 45 deletions(-)