diff mbox

[v3,1/3] drm/i915/guc: Use intel_guc_init_misc to hide GuC internals

Message ID 20180628141522.62788-1-michal.wajdeczko@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Michal Wajdeczko June 28, 2018, 2:15 p.m. UTC
We will add more init steps to misc phase and there is no need
to expose them separately for use in uc_init_misc function.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
---
 drivers/gpu/drm/i915/intel_guc.c | 28 ++++++++++++++++++++++++----
 drivers/gpu/drm/i915/intel_guc.h |  5 ++---
 drivers/gpu/drm/i915/intel_uc.c  |  6 ++----
 3 files changed, 28 insertions(+), 11 deletions(-)

Comments

Michal Wajdeczko June 28, 2018, 9:19 p.m. UTC | #1
On Thu, 28 Jun 2018 20:20:11 +0200, Patchwork  
<patchwork@emeril.freedesktop.org> wrote:

> == Series Details ==
>
> Series: series starting with [v3,1/3] drm/i915/guc: Use  
> intel_guc_init_misc to hide GuC internals
> URL   : https://patchwork.freedesktop.org/series/45593/
> State : failure
>
> == Summary ==
>
> = CI Bug Log - changes from CI_DRM_4397_full -> Patchwork_9474_full =
>
> == Summary - FAILURE ==
>
>   Serious unknown changes coming with Patchwork_9474_full absolutely  
> need to be
>   verified manually.
>  If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_9474_full, please notify your bug team to  
> allow them
>   to document this new failure mode, which will reduce false positives  
> in CI.
>
>
> == Possible new issues ==
>
>   Here are the unknown changes that may have been introduced in  
> Patchwork_9474_full:
>
>   === IGT changes ===
>
>     ==== Possible regressions ====
>
>     igt@drv_selftest@mock_contexts:
>       shard-apl:          PASS -> DMESG-FAIL
>       shard-kbl:          PASS -> DMESG-FAIL
>       shard-snb:          PASS -> DMESG-FAIL
>       shard-hsw:          PASS -> DMESG-FAIL
>       shard-glk:          PASS -> DMESG-FAIL
>
>     igt@pm_rpm@debugfs-read:
>       shard-kbl:          PASS -> DMESG-WARN +3
>

all these issues are the same as with HAX alone - see [1]

[1] https://patchwork.freedesktop.org/series/40112/


>    ==== Warnings ====
>
>     igt@drv_selftest@live_evict:
>       shard-snb:          PASS -> SKIP +13
>
>     igt@drv_selftest@live_execlists:
>       shard-hsw:          PASS -> SKIP +13
>
>     igt@drv_selftest@live_objects:
>       shard-glk:          PASS -> SKIP +6
>
>     igt@drv_selftest@live_requests:
>       shard-kbl:          PASS -> SKIP +17
>
>     igt@drv_selftest@live_workarounds:
>       shard-apl:          PASS -> SKIP +18
>
> == Known issues ==
>
>   Here are the changes found in Patchwork_9474_full that come from known  
> issues:
>
>   === IGT changes ===
>
>     ==== Issues hit ====
>
>     igt@drv_suspend@shrink:
>       shard-apl:          PASS -> FAIL (fdo#106886)
>
>     igt@gem_eio@execbuf:
>       shard-apl:          PASS -> INCOMPLETE (fdo#103927) +1
>
>     igt@gem_exec_big:
>       shard-hsw:          PASS -> INCOMPLETE (fdo#103540)
>
>     igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
>       shard-hsw:          PASS -> FAIL (fdo#105767)
>
>     igt@kms_flip@flip-vs-expired-vblank:
>       shard-hsw:          PASS -> FAIL (fdo#102887, fdo#105363)
>
>     igt@kms_flip@plain-flip-fb-recreate:
>       shard-glk:          PASS -> FAIL (fdo#100368)
>
>     igt@perf_pmu@busy-accuracy-98-vcs1:
>       shard-snb:          NOTRUN -> INCOMPLETE (fdo#105411)
>
>     igt@prime_busy@wait-hang-vebox:
>       shard-kbl:          PASS -> INCOMPLETE (fdo#103665) +3
>
>    ==== Possible fixes ====
>
>     igt@drv_selftest@live_gtt:
>       shard-glk:          INCOMPLETE (k.org#198133, fdo#103359) -> SKIP
>
>     igt@gem_exec_schedule@preemptive-hang-render:
>       shard-snb:          INCOMPLETE (fdo#105411) -> SKIP
>
>     igt@kms_flip@2x-flip-vs-expired-vblank:
>       shard-glk:          FAIL (fdo#105363) -> PASS
>
>     igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
>       shard-glk:          FAIL (fdo#100368) -> PASS
>
>     igt@kms_flip@flip-vs-expired-vblank:
>       shard-glk:          FAIL (fdo#105189) -> PASS
>
>  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
>   fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
>   fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
>   fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
>   fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
>   fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
>   fdo#105189 https://bugs.freedesktop.org/show_bug.cgi?id=105189
>   fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
>   fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
>   fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767
>   fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
>   k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133
>
>
> == Participating hosts (5 -> 5) ==
>
>   No changes in participating hosts
>
>
> == Build changes ==
>
>     * Linux: CI_DRM_4397 -> Patchwork_9474
>
>   CI_DRM_4397: 7306233935b0e426454e8adcf09a8022faa03cbc @  
> git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @  
> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_9474: ccc231a5581546d05cf86d310ea71136487aeb73 @  
> git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @  
> git://anongit.freedesktop.org/piglit
>
> == Logs ==
>
> For more details see:  
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9474/shards.html
Chris Wilson June 28, 2018, 9:42 p.m. UTC | #2
Quoting Michal Wajdeczko (2018-06-28 22:19:31)
> On Thu, 28 Jun 2018 20:20:11 +0200, Patchwork  
> <patchwork@emeril.freedesktop.org> wrote:
> 
> > == Series Details ==
> >
> > Series: series starting with [v3,1/3] drm/i915/guc: Use  
> > intel_guc_init_misc to hide GuC internals
> > URL   : https://patchwork.freedesktop.org/series/45593/
> > State : failure
> >
> > == Summary ==
> >
> > = CI Bug Log - changes from CI_DRM_4397_full -> Patchwork_9474_full =
> >
> > == Summary - FAILURE ==
> >
> >   Serious unknown changes coming with Patchwork_9474_full absolutely  
> > need to be
> >   verified manually.
> >  If you think the reported changes have nothing to do with the changes
> >   introduced in Patchwork_9474_full, please notify your bug team to  
> > allow them
> >   to document this new failure mode, which will reduce false positives  
> > in CI.
> >
> >
> > == Possible new issues ==
> >
> >   Here are the unknown changes that may have been introduced in  
> > Patchwork_9474_full:
> >
> >   === IGT changes ===
> >
> >     ==== Possible regressions ====
> >
> >     igt@drv_selftest@mock_contexts:
> >       shard-apl:          PASS -> DMESG-FAIL
> >       shard-kbl:          PASS -> DMESG-FAIL
> >       shard-snb:          PASS -> DMESG-FAIL
> >       shard-hsw:          PASS -> DMESG-FAIL
> >       shard-glk:          PASS -> DMESG-FAIL
> >
> >     igt@pm_rpm@debugfs-read:
> >       shard-kbl:          PASS -> DMESG-WARN +3
> >
> 
> all these issues are the same as with HAX alone - see [1]

And still waiting for the fix ;)
-Chris
Michel Thierry June 28, 2018, 9:44 p.m. UTC | #3
On 6/28/2018 7:15 AM, Michal Wajdeczko wrote:
> We will add more init steps to misc phase and there is no need
> to expose them separately for use in uc_init_misc function.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_guc.c | 28 ++++++++++++++++++++++++----
>   drivers/gpu/drm/i915/intel_guc.h |  5 ++---
>   drivers/gpu/drm/i915/intel_uc.c  |  6 ++----
>   3 files changed, 28 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> index f651e57..0b06f27 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -27,6 +27,8 @@
>   #include "intel_guc_submission.h"
>   #include "i915_drv.h"
>   
> +static void guc_init_ggtt_pin_bias(struct intel_guc *guc);
> +
>   static void gen8_guc_raise_irq(struct intel_guc *guc)
>   {
>   	struct drm_i915_private *dev_priv = guc_to_i915(guc);
> @@ -73,7 +75,7 @@ void intel_guc_init_early(struct intel_guc *guc)
>   	guc->notify = gen8_guc_raise_irq;
>   }
>   
> -int intel_guc_init_wq(struct intel_guc *guc)
> +static int guc_init_wq(struct intel_guc *guc)
>   {
>   	struct drm_i915_private *dev_priv = guc_to_i915(guc);
>   
> @@ -124,7 +126,7 @@ int intel_guc_init_wq(struct intel_guc *guc)
>   	return 0;
>   }
>   
> -void intel_guc_fini_wq(struct intel_guc *guc)
> +static void guc_fini_wq(struct intel_guc *guc)
>   {
>   	struct drm_i915_private *dev_priv = guc_to_i915(guc);
>   
> @@ -135,6 +137,24 @@ void intel_guc_fini_wq(struct intel_guc *guc)
>   	destroy_workqueue(guc->log.relay.flush_wq);
>   }
>   
> +int intel_guc_init_misc(struct intel_guc *guc)

So the pattern is to name static functions "guc_*" and non-static 
functions "intel_guc_*"?

Reviewed-by: Michel Thierry <michel.thierry@intel.com>

> +{
> +	int ret;
> +
> +	guc_init_ggtt_pin_bias(guc);
> +
> +	ret = guc_init_wq(guc);
> +	if (ret)
> +		return ret;
> +
> +	return 0;
> +}
> +
> +void intel_guc_fini_misc(struct intel_guc *guc)
> +{
> +	guc_fini_wq(guc);
> +}
> +
>   static int guc_shared_data_create(struct intel_guc *guc)
>   {
>   	struct i915_vma *vma;
> @@ -582,13 +602,13 @@ int intel_guc_resume(struct intel_guc *guc)
>    */
>   
>   /**
> - * intel_guc_init_ggtt_pin_bias() - Initialize the GuC ggtt_pin_bias value.
> + * guc_init_ggtt_pin_bias() - Initialize the GuC ggtt_pin_bias value.
>    * @guc: intel_guc structure.
>    *
>    * This function will calculate and initialize the ggtt_pin_bias value based on
>    * overall WOPCM size and GuC WOPCM size.
>    */
> -void intel_guc_init_ggtt_pin_bias(struct intel_guc *guc)
> +static void guc_init_ggtt_pin_bias(struct intel_guc *guc)
>   {
>   	struct drm_i915_private *i915 = guc_to_i915(guc);
>   
> diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
> index f1265e1..4121928 100644
> --- a/drivers/gpu/drm/i915/intel_guc.h
> +++ b/drivers/gpu/drm/i915/intel_guc.h
> @@ -151,11 +151,10 @@ static inline u32 intel_guc_ggtt_offset(struct intel_guc *guc,
>   void intel_guc_init_early(struct intel_guc *guc);
>   void intel_guc_init_send_regs(struct intel_guc *guc);
>   void intel_guc_init_params(struct intel_guc *guc);
> -void intel_guc_init_ggtt_pin_bias(struct intel_guc *guc);
> -int intel_guc_init_wq(struct intel_guc *guc);
> -void intel_guc_fini_wq(struct intel_guc *guc);
> +int intel_guc_init_misc(struct intel_guc *guc);
>   int intel_guc_init(struct intel_guc *guc);
>   void intel_guc_fini(struct intel_guc *guc);
> +void intel_guc_fini_misc(struct intel_guc *guc);
>   int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len,
>   		       u32 *response_buf, u32 response_buf_size);
>   int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index 94e8863..cd49b4f 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -257,9 +257,7 @@ int intel_uc_init_misc(struct drm_i915_private *i915)
>   	if (!USES_GUC(i915))
>   		return 0;
>   
> -	intel_guc_init_ggtt_pin_bias(guc);
> -
> -	ret = intel_guc_init_wq(guc);
> +	ret = intel_guc_init_misc(guc);
>   	if (ret)
>   		return ret;
>   
> @@ -273,7 +271,7 @@ void intel_uc_fini_misc(struct drm_i915_private *i915)
>   	if (!USES_GUC(i915))
>   		return;
>   
> -	intel_guc_fini_wq(guc);
> +	intel_guc_fini_misc(guc);
>   }
>   
>   int intel_uc_init(struct drm_i915_private *i915)
>
Chris Wilson June 28, 2018, 9:54 p.m. UTC | #4
Quoting Michel Thierry (2018-06-28 22:44:43)
> On 6/28/2018 7:15 AM, Michal Wajdeczko wrote:
> > We will add more init steps to misc phase and there is no need
> > to expose them separately for use in uc_init_misc function.
> > 
> > Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> > Cc: Michel Thierry <michel.thierry@intel.com>
> > ---
> >   drivers/gpu/drm/i915/intel_guc.c | 28 ++++++++++++++++++++++++----
> >   drivers/gpu/drm/i915/intel_guc.h |  5 ++---
> >   drivers/gpu/drm/i915/intel_uc.c  |  6 ++----
> >   3 files changed, 28 insertions(+), 11 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> > index f651e57..0b06f27 100644
> > --- a/drivers/gpu/drm/i915/intel_guc.c
> > +++ b/drivers/gpu/drm/i915/intel_guc.c
> > @@ -27,6 +27,8 @@
> >   #include "intel_guc_submission.h"
> >   #include "i915_drv.h"
> >   
> > +static void guc_init_ggtt_pin_bias(struct intel_guc *guc);
> > +
> >   static void gen8_guc_raise_irq(struct intel_guc *guc)
> >   {
> >       struct drm_i915_private *dev_priv = guc_to_i915(guc);
> > @@ -73,7 +75,7 @@ void intel_guc_init_early(struct intel_guc *guc)
> >       guc->notify = gen8_guc_raise_irq;
> >   }
> >   
> > -int intel_guc_init_wq(struct intel_guc *guc)
> > +static int guc_init_wq(struct intel_guc *guc)
> >   {
> >       struct drm_i915_private *dev_priv = guc_to_i915(guc);
> >   
> > @@ -124,7 +126,7 @@ int intel_guc_init_wq(struct intel_guc *guc)
> >       return 0;
> >   }
> >   
> > -void intel_guc_fini_wq(struct intel_guc *guc)
> > +static void guc_fini_wq(struct intel_guc *guc)
> >   {
> >       struct drm_i915_private *dev_priv = guc_to_i915(guc);
> >   
> > @@ -135,6 +137,24 @@ void intel_guc_fini_wq(struct intel_guc *guc)
> >       destroy_workqueue(guc->log.relay.flush_wq);
> >   }
> >   
> > +int intel_guc_init_misc(struct intel_guc *guc)
> 
> So the pattern is to name static functions "guc_*" and non-static 
> functions "intel_guc_*"?

Yup, seems to be working out reasonably around the place.
 
> Reviewed-by: Michel Thierry <michel.thierry@intel.com>

Thanks for the review and patches, pushed.
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index f651e57..0b06f27 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -27,6 +27,8 @@ 
 #include "intel_guc_submission.h"
 #include "i915_drv.h"
 
+static void guc_init_ggtt_pin_bias(struct intel_guc *guc);
+
 static void gen8_guc_raise_irq(struct intel_guc *guc)
 {
 	struct drm_i915_private *dev_priv = guc_to_i915(guc);
@@ -73,7 +75,7 @@  void intel_guc_init_early(struct intel_guc *guc)
 	guc->notify = gen8_guc_raise_irq;
 }
 
-int intel_guc_init_wq(struct intel_guc *guc)
+static int guc_init_wq(struct intel_guc *guc)
 {
 	struct drm_i915_private *dev_priv = guc_to_i915(guc);
 
@@ -124,7 +126,7 @@  int intel_guc_init_wq(struct intel_guc *guc)
 	return 0;
 }
 
-void intel_guc_fini_wq(struct intel_guc *guc)
+static void guc_fini_wq(struct intel_guc *guc)
 {
 	struct drm_i915_private *dev_priv = guc_to_i915(guc);
 
@@ -135,6 +137,24 @@  void intel_guc_fini_wq(struct intel_guc *guc)
 	destroy_workqueue(guc->log.relay.flush_wq);
 }
 
+int intel_guc_init_misc(struct intel_guc *guc)
+{
+	int ret;
+
+	guc_init_ggtt_pin_bias(guc);
+
+	ret = guc_init_wq(guc);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+void intel_guc_fini_misc(struct intel_guc *guc)
+{
+	guc_fini_wq(guc);
+}
+
 static int guc_shared_data_create(struct intel_guc *guc)
 {
 	struct i915_vma *vma;
@@ -582,13 +602,13 @@  int intel_guc_resume(struct intel_guc *guc)
  */
 
 /**
- * intel_guc_init_ggtt_pin_bias() - Initialize the GuC ggtt_pin_bias value.
+ * guc_init_ggtt_pin_bias() - Initialize the GuC ggtt_pin_bias value.
  * @guc: intel_guc structure.
  *
  * This function will calculate and initialize the ggtt_pin_bias value based on
  * overall WOPCM size and GuC WOPCM size.
  */
-void intel_guc_init_ggtt_pin_bias(struct intel_guc *guc)
+static void guc_init_ggtt_pin_bias(struct intel_guc *guc)
 {
 	struct drm_i915_private *i915 = guc_to_i915(guc);
 
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index f1265e1..4121928 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -151,11 +151,10 @@  static inline u32 intel_guc_ggtt_offset(struct intel_guc *guc,
 void intel_guc_init_early(struct intel_guc *guc);
 void intel_guc_init_send_regs(struct intel_guc *guc);
 void intel_guc_init_params(struct intel_guc *guc);
-void intel_guc_init_ggtt_pin_bias(struct intel_guc *guc);
-int intel_guc_init_wq(struct intel_guc *guc);
-void intel_guc_fini_wq(struct intel_guc *guc);
+int intel_guc_init_misc(struct intel_guc *guc);
 int intel_guc_init(struct intel_guc *guc);
 void intel_guc_fini(struct intel_guc *guc);
+void intel_guc_fini_misc(struct intel_guc *guc);
 int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len,
 		       u32 *response_buf, u32 response_buf_size);
 int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len,
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 94e8863..cd49b4f 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -257,9 +257,7 @@  int intel_uc_init_misc(struct drm_i915_private *i915)
 	if (!USES_GUC(i915))
 		return 0;
 
-	intel_guc_init_ggtt_pin_bias(guc);
-
-	ret = intel_guc_init_wq(guc);
+	ret = intel_guc_init_misc(guc);
 	if (ret)
 		return ret;
 
@@ -273,7 +271,7 @@  void intel_uc_fini_misc(struct drm_i915_private *i915)
 	if (!USES_GUC(i915))
 		return;
 
-	intel_guc_fini_wq(guc);
+	intel_guc_fini_misc(guc);
 }
 
 int intel_uc_init(struct drm_i915_private *i915)