| Message ID | 20180710200205.1478-1-radhakrishna.sripada@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Jul 11, 2018 at 12:09:55AM +0000, Patchwork wrote: > == Series Details == > > Series: drm/i915/glk: Add Quirk for GLK NUC HDMI port issues. (rev5) > URL : https://patchwork.freedesktop.org/series/44446/ > State : failure > > == Summary == > > = CI Bug Log - changes from CI_DRM_4467_full -> Patchwork_9606_full = > > == Summary - FAILURE == > > Serious unknown changes coming with Patchwork_9606_full absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_9606_full, please notify your bug team to allow them > to document this new failure mode, which will reduce false positives in CI. > > > > == Possible new issues == > > Here are the unknown changes that may have been introduced in Patchwork_9606_full: > > === IGT changes === > > ==== Possible regressions ==== > > igt@kms_universal_plane@cursor-fb-leak-pipe-a: > shard-apl: PASS -> FAIL > > > ==== Warnings ==== > > igt@gem_exec_schedule@deep-bsd2: > shard-kbl: PASS -> SKIP The WA makes a difference only on GLK platforms so the fail/skip look unrelated. Thanks for the patch and testing I pushed it to -dinq adding my R-b and Cc:stable. > > igt@pm_rc6_residency@rc6-accuracy: > shard-kbl: SKIP -> PASS > > > == Known issues == > > Here are the changes found in Patchwork_9606_full that come from known issues: > > === IGT changes === > > ==== Issues hit ==== > > igt@kms_atomic_transition@plane-all-modeset-transition-fencing: > shard-glk: PASS -> INCOMPLETE (fdo#103359, k.org#198133) +1 > > igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic: > shard-glk: PASS -> FAIL (fdo#106509, fdo#105454) +1 > > > ==== Possible fixes ==== > > igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: > shard-hsw: FAIL (fdo#105363) -> PASS > > igt@kms_flip@2x-plain-flip-fb-recreate-interruptible: > shard-hsw: FAIL (fdo#100368) -> PASS > > igt@kms_flip@dpms-vs-vblank-race: > shard-hsw: FAIL (fdo#103060) -> PASS > > igt@kms_flip_tiling@flip-to-y-tiled: > shard-glk: FAIL (fdo#107161) -> PASS > > igt@kms_flip_tiling@flip-x-tiled: > shard-glk: FAIL (fdo#107161, fdo#103822) -> PASS +1 > > igt@kms_rotation_crc@sprite-rotation-180: > shard-hsw: FAIL (fdo#103925) -> PASS > > igt@kms_setmode@basic: > shard-apl: FAIL (fdo#99912) -> PASS > shard-kbl: FAIL (fdo#99912) -> PASS > > > fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 > fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 > fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359 > fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 > fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925 > fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363 > fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454 > fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509 > fdo#107161 https://bugs.freedesktop.org/show_bug.cgi?id=107161 > fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 > k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133 > > > == Participating hosts (5 -> 5) == > > No changes in participating hosts > > > == Build changes == > > * Linux: CI_DRM_4467 -> Patchwork_9606 > > CI_DRM_4467: d43ac253ef86f6c89e4e69130baa2c5021a95696 @ git://anongit.freedesktop.org/gfx-ci/linux > IGT_4546: e8905e756cf3640c66541e963ff97f8af2d98936 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_9606: 068faa878cfc4d3d66bd22cd8bb3af4f7b6e96ba @ git://anongit.freedesktop.org/gfx-ci/linux > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9606/shards.html > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index eeb002a47032..2b859cbdc1ac 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -650,6 +650,7 @@ enum intel_sbi_destination { #define QUIRK_BACKLIGHT_PRESENT (1<<3) #define QUIRK_PIN_SWIZZLED_PAGES (1<<5) #define QUIRK_INCREASE_T12_DELAY (1<<6) +#define QUIRK_INCREASE_DDI_DISABLED_TIME (1<<7) struct intel_fbdev; struct intel_fbc_work; diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 32838ed89ee7..e4caa902d88e 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1808,15 +1808,24 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state) I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp); } -void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, - enum transcoder cpu_transcoder) +void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state) { + struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder); uint32_t val = I915_READ(reg); val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK | TRANS_DDI_DP_VC_PAYLOAD_ALLOC); val |= TRANS_DDI_PORT_NONE; I915_WRITE(reg, val); + + if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME && + intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { + DRM_DEBUG_KMS("Quirk Increase DDI disabled time\n"); + /* Quirk time at 100ms for reliable operation */ + msleep(100); + } } int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder, diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7998e70a3174..e14d2e9fb673 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5837,7 +5837,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, intel_ddi_set_vc_payload_alloc(old_crtc_state, false); if (!transcoder_is_dsi(cpu_transcoder)) - intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder); + intel_ddi_disable_transcoder_func(old_crtc_state); if (INTEL_GEN(dev_priv) >= 9) skylake_scaler_disable(intel_crtc); @@ -14849,6 +14849,17 @@ static void quirk_increase_t12_delay(struct drm_device *dev) DRM_INFO("Applying T12 delay quirk\n"); } +/* GeminiLake NUC HDMI outputs require additional off time + * this allows the onboard retimer to correctly sync to signal + */ +static void quirk_increase_ddi_disabled_time(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = to_i915(dev); + + dev_priv->quirks |= QUIRK_INCREASE_DDI_DISABLED_TIME; + DRM_INFO("Applying Increase DDI Disabled quirk\n"); +} + struct intel_quirk { int device; int subsystem_vendor; @@ -14935,6 +14946,13 @@ static struct intel_quirk intel_quirks[] = { /* Toshiba Satellite P50-C-18C */ { 0x191B, 0x1179, 0xF840, quirk_increase_t12_delay }, + + /* GeminiLake NUC */ + { 0x3185, 0x8086, 0x2072, quirk_increase_ddi_disabled_time }, + { 0x3184, 0x8086, 0x2072, quirk_increase_ddi_disabled_time }, + /* ASRock ITX*/ + { 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time }, + { 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time }, }; static void intel_init_quirks(struct drm_device *dev) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 61e715ddd0d5..7197715a6130 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1385,8 +1385,7 @@ void hsw_fdi_link_train(struct intel_crtc *crtc, void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port); bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe); void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state); -void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, - enum transcoder cpu_transcoder); +void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state); void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state); void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state); void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state);