Message ID | 51acc44e6fd0458e63635b92428fe7743e18a3c7.1531474202.git.leonard.crestez@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Fri, Jul 13, 2018 at 6:39 AM, Leonard Crestez <leonard.crestez@nxp.com> wrote: > The imx6sl soc has gpu_2d and gpu_vg, no 3d support: > > etnaviv-gpu 2200000.gpu: model: GC320, revision: 5007 > etnaviv-gpu 2204000.gpu: model: GC355, revision: 1215 > > The IP blocks seem to be already supported. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> > Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
On Fri, Jul 13, 2018 at 12:39:35PM +0300, Leonard Crestez wrote: > The imx6sl soc has gpu_2d and gpu_vg, no 3d support: > > etnaviv-gpu 2200000.gpu: model: GC320, revision: 5007 > etnaviv-gpu 2204000.gpu: model: GC355, revision: 1215 > > The IP blocks seem to be already supported. > > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> > Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Applied, thanks.
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index a6bc21433839..84413725b722 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -946,7 +946,27 @@ compatible = "fsl,imx6sl-audmux", "fsl,imx31-audmux"; reg = <0x021d8000 0x4000>; status = "disabled"; }; }; + + gpu_2d: gpu@2200000 { + compatible = "vivante,gc"; + reg = <0x02200000 0x4000>; + interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6SL_CLK_MMDC_ROOT>, + <&clks IMX6SL_CLK_GPU2D_OVG>; + clock-names = "bus", "core"; + power-domains = <&pd_pu>; + }; + + gpu_vg: gpu@2204000 { + compatible = "vivante,gc"; + reg = <0x02204000 0x4000>; + interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6SL_CLK_MMDC_ROOT>, + <&clks IMX6SL_CLK_GPU2D_OVG>; + clock-names = "bus", "core"; + power-domains = <&pd_pu>; + }; }; };