diff mbox

[v2,3/5] drm/i915: Remove unnecessary ggtt_offset_bias from i915_gem_context

Message ID 20180718115412.30496-3-jakub.bartminski@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Bartminski, Jakub July 18, 2018, 11:54 a.m. UTC
Since ggtt_offset_bias is now stored in ggtt.pin_bias, it is duplicated
inside i915_gem_context, and can instead be accessed directly from ggtt.

Signed-off-by: Jakub Bartmiński <jakub.bartminski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_context.c | 2 --
 drivers/gpu/drm/i915/i915_gem_context.h | 3 ---
 drivers/gpu/drm/i915/intel_lrc.c        | 6 +++---
 3 files changed, 3 insertions(+), 8 deletions(-)

Comments

Chris Wilson July 18, 2018, 12:28 p.m. UTC | #1
Quoting Jakub Bartmiński (2018-07-18 12:54:10)
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 35d37af0cb9a..7a3c8921f688 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1363,8 +1363,8 @@ static int __context_pin(struct i915_gem_context *ctx, struct i915_vma *vma)
>         }
>  
>         flags = PIN_GLOBAL | PIN_HIGH;
> -       if (ctx->ggtt_offset_bias)
> -               flags |= PIN_OFFSET_BIAS | ctx->ggtt_offset_bias;
> +       if (ctx->i915->ggtt.pin_bias)
> +               flags |= PIN_OFFSET_BIAS | ctx->i915->ggtt.pin_bias;

static inline u32 i915_ggtt_pin_bias(struct i915_vma *vma)
{
	return i915_vm_to_ggtt(vma->vm)->pin_bias;
}

To include | PIN_OFFSET_BIAS or not? Probably not. Retcon that earlier
in the series.
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 32f96b8cd9c4..f15a039772db 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -329,8 +329,6 @@  __create_hw_context(struct drm_i915_private *dev_priv,
 	ctx->desc_template =
 		default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt);
 
-	ctx->ggtt_offset_bias = dev_priv->ggtt.pin_bias;
-
 	return ctx;
 
 err_pid:
diff --git a/drivers/gpu/drm/i915/i915_gem_context.h b/drivers/gpu/drm/i915/i915_gem_context.h
index b116e4942c10..851dad6decd7 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/i915_gem_context.h
@@ -147,9 +147,6 @@  struct i915_gem_context {
 
 	struct i915_sched_attr sched;
 
-	/** ggtt_offset_bias: placement restriction for context objects */
-	u32 ggtt_offset_bias;
-
 	/** engine: per-engine logical HW state */
 	struct intel_context {
 		struct i915_gem_context *gem_context;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 35d37af0cb9a..7a3c8921f688 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1363,8 +1363,8 @@  static int __context_pin(struct i915_gem_context *ctx, struct i915_vma *vma)
 	}
 
 	flags = PIN_GLOBAL | PIN_HIGH;
-	if (ctx->ggtt_offset_bias)
-		flags |= PIN_OFFSET_BIAS | ctx->ggtt_offset_bias;
+	if (ctx->i915->ggtt.pin_bias)
+		flags |= PIN_OFFSET_BIAS | ctx->i915->ggtt.pin_bias;
 
 	return i915_vma_pin(vma, 0, GEN8_LR_CONTEXT_ALIGN, flags);
 }
@@ -1392,7 +1392,7 @@  __execlists_context_pin(struct intel_engine_cs *engine,
 		goto unpin_vma;
 	}
 
-	ret = intel_ring_pin(ce->ring, ctx->i915, ctx->ggtt_offset_bias);
+	ret = intel_ring_pin(ce->ring, ctx->i915, ctx->i915->ggtt.pin_bias);
 	if (ret)
 		goto unpin_map;