| Message ID | 20180719083542.22220-4-jakub.bartminski@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Quoting Jakub Bartmiński (2018-07-19 09:35:41) > Signed-off-by: Jakub Bartmiński <jakub.bartminski@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Michał Winiarski <michal.winiarski@intel.com> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > --- > drivers/gpu/drm/i915/i915_gem.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index ed2be33ec58a..dd170a293d05 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -5475,6 +5475,11 @@ int i915_gem_init(struct drm_i915_private *dev_priv) > if (ret) > goto err_uc_misc; > > + if (i915_inject_load_failure()) { > + ret = -E2BIG; > + goto err_uc_misc; > + } Push it down to the callee. I want us to exercise what happens when that fails. Otherwise we just have static fault injection and never need to worry about the order here. -Chris
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index ed2be33ec58a..dd170a293d05 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -5475,6 +5475,11 @@ int i915_gem_init(struct drm_i915_private *dev_priv) if (ret) goto err_uc_misc; + if (i915_inject_load_failure()) { + ret = -E2BIG; + goto err_uc_misc; + } + /* This is just a security blanket to placate dragons. * On some systems, we very sporadically observe that the first TLBs * used by the CS may be stale, despite us poking the TLB reset. If
Signed-off-by: Jakub Bartmiński <jakub.bartminski@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michał Winiarski <michal.winiarski@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> --- drivers/gpu/drm/i915/i915_gem.c | 5 +++++ 1 file changed, 5 insertions(+)