| Message ID | 1532554138-3551-2-git-send-email-anusha.srivatsa@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] drm/i915/icl: Add TBT checks for PLL calculations | expand |
Em Qua, 2018-07-25 às 14:28 -0700, Anusha Srivatsa escreveu: > For a TBT sequence, we need to set the IO type to TBT > in DDI_AUX_CTL. > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_dp.c | 34 +++++++++++++++++++++++++---- > ----- > 2 files changed, 26 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > b/drivers/gpu/drm/i915/i915_reg.h > index 5530c47..7bdc214 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -5558,6 +5558,7 @@ enum { > #define DP_AUX_CH_CTL_PSR_DATA_AUX_REG_SKL (1 << 14) > #define DP_AUX_CH_CTL_FS_DATA_AUX_REG_SKL (1 << 13) > #define DP_AUX_CH_CTL_GTC_DATA_AUX_REG_SKL (1 << 12) > +#define DP_AUX_CH_CTL_TBT_IO (1 << 11) > #define DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL_MASK (0x1f << 5) > #define DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(c) (((c) - 1) << 5) > #define DP_AUX_CH_CTL_SYNC_PULSE_SKL(c) ((c) - 1) > diff --git a/drivers/gpu/drm/i915/intel_dp.c > b/drivers/gpu/drm/i915/intel_dp.c > index cc33d7c..90a8e2f 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -1208,15 +1208,31 @@ static uint32_t skl_get_aux_send_ctl(struct > intel_dp *intel_dp, > int send_bytes, > uint32_t unused) > { > - return DP_AUX_CH_CTL_SEND_BUSY | > - DP_AUX_CH_CTL_DONE | > - DP_AUX_CH_CTL_INTERRUPT | > - DP_AUX_CH_CTL_TIME_OUT_ERROR | > - DP_AUX_CH_CTL_TIME_OUT_MAX | > - DP_AUX_CH_CTL_RECEIVE_ERROR | > - (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | > - DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) | > - DP_AUX_CH_CTL_SYNC_PULSE_SKL(32); > + struct intel_digital_port *intel_dig_port = > dp_to_dig_port(intel_dp); > + struct drm_i915_private *dev_priv = to_i915(intel_dig_port- > >base.base.dev); > + > + if (INTEL_GEN(dev_priv) >= 11 There's no need for this check, since intel_dig_port->tc_type can't be TC_PORT_TBT on platforms earlier than gen11. If we were to add a check, I'd suggest to use intel_port_is_tc(), but I don't see the need. There's a lot of avoidable duplicate code. Please avoid it with something like: --- uint32_t ret; ret = DP_AUX_CH_CTL_SEND_BUSY | DP_AUX_CH_CTL_DONE | etc; if (intel_dig_port->tc_type == TC_PORT_TBT) ret |= DP_AUX_CH_CTL_TBT_IO; return ret; --- Thanks, Paulo > && intel_dig_port->tc_type == TC_PORT_TBT) { > + return DP_AUX_CH_CTL_SEND_BUSY | > + DP_AUX_CH_CTL_DONE | > + DP_AUX_CH_CTL_INTERRUPT | > + DP_AUX_CH_CTL_TIME_OUT_ERROR | > + DP_AUX_CH_CTL_TIME_OUT_MAX | > + DP_AUX_CH_CTL_RECEIVE_ERROR | > + (send_bytes << > DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | > + DP_AUX_CH_CTL_TBT_IO | > + DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) | > + DP_AUX_CH_CTL_SYNC_PULSE_SKL(32); > + } else { > + return DP_AUX_CH_CTL_SEND_BUSY | > + DP_AUX_CH_CTL_DONE | > + DP_AUX_CH_CTL_INTERRUPT | > + DP_AUX_CH_CTL_TIME_OUT_ERROR | > + DP_AUX_CH_CTL_TIME_OUT_MAX | > + DP_AUX_CH_CTL_RECEIVE_ERROR | > + (send_bytes << > DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | > + DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) | > + DP_AUX_CH_CTL_SYNC_PULSE_SKL(32); > + } > } > > static int
>-----Original Message----- >From: Zanoni, Paulo R >Sent: Wednesday, July 25, 2018 4:08 PM >To: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel- >gfx@lists.freedesktop.org >Subject: Re: [PATCH 2/2] drm/i915/icl: Set TBT IO in Aux transaction > >Em Qua, 2018-07-25 às 14:28 -0700, Anusha Srivatsa escreveu: >> For a TBT sequence, we need to set the IO type to TBT in DDI_AUX_CTL. >> >> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> >> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> >> --- >> drivers/gpu/drm/i915/i915_reg.h | 1 + >> drivers/gpu/drm/i915/intel_dp.c | 34 +++++++++++++++++++++++++---- >> ----- >> 2 files changed, 26 insertions(+), 9 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_reg.h >> b/drivers/gpu/drm/i915/i915_reg.h index 5530c47..7bdc214 100644 >> --- a/drivers/gpu/drm/i915/i915_reg.h >> +++ b/drivers/gpu/drm/i915/i915_reg.h >> @@ -5558,6 +5558,7 @@ enum { >> #define DP_AUX_CH_CTL_PSR_DATA_AUX_REG_SKL (1 << 14) >> #define DP_AUX_CH_CTL_FS_DATA_AUX_REG_SKL (1 << 13) >> #define DP_AUX_CH_CTL_GTC_DATA_AUX_REG_SKL (1 << 12) >> +#define DP_AUX_CH_CTL_TBT_IO (1 << 11) >> #define DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL_MASK (0x1f << 5) >> #define DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(c) (((c) - 1) << 5) >> #define DP_AUX_CH_CTL_SYNC_PULSE_SKL(c) ((c) - 1) >> diff --git a/drivers/gpu/drm/i915/intel_dp.c >> b/drivers/gpu/drm/i915/intel_dp.c index cc33d7c..90a8e2f 100644 >> --- a/drivers/gpu/drm/i915/intel_dp.c >> +++ b/drivers/gpu/drm/i915/intel_dp.c >> @@ -1208,15 +1208,31 @@ static uint32_t skl_get_aux_send_ctl(struct >> intel_dp *intel_dp, >> int send_bytes, >> uint32_t unused) >> { >> - return DP_AUX_CH_CTL_SEND_BUSY | >> - DP_AUX_CH_CTL_DONE | >> - DP_AUX_CH_CTL_INTERRUPT | >> - DP_AUX_CH_CTL_TIME_OUT_ERROR | >> - DP_AUX_CH_CTL_TIME_OUT_MAX | >> - DP_AUX_CH_CTL_RECEIVE_ERROR | >> - (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | >> - DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) | >> - DP_AUX_CH_CTL_SYNC_PULSE_SKL(32); >> + struct intel_digital_port *intel_dig_port = >> dp_to_dig_port(intel_dp); >> + struct drm_i915_private *dev_priv = to_i915(intel_dig_port- >> >base.base.dev); >> + >> + if (INTEL_GEN(dev_priv) >= 11 > >There's no need for this check, since intel_dig_port->tc_type can't be >TC_PORT_TBT on platforms earlier than gen11. That is true. >If we were to add a check, I'd suggest to use intel_port_is_tc(), but I don't see the >need. >There's a lot of avoidable duplicate code. Please avoid it with something like: > >--- >uint32_t ret; > >ret = DP_AUX_CH_CTL_SEND_BUSY | > DP_AUX_CH_CTL_DONE | > etc; > >if (intel_dig_port->tc_type == TC_PORT_TBT) > ret |= DP_AUX_CH_CTL_TBT_IO; > >return ret; That’s a much better approach. Thanks for the feedback. Anusha >--- > > >Thanks, >Paulo > >> && intel_dig_port->tc_type == TC_PORT_TBT) { >> + return DP_AUX_CH_CTL_SEND_BUSY | >> + DP_AUX_CH_CTL_DONE | >> + DP_AUX_CH_CTL_INTERRUPT | >> + DP_AUX_CH_CTL_TIME_OUT_ERROR | >> + DP_AUX_CH_CTL_TIME_OUT_MAX | >> + DP_AUX_CH_CTL_RECEIVE_ERROR | >> + (send_bytes << >> DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | >> + DP_AUX_CH_CTL_TBT_IO | >> + DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) | >> + DP_AUX_CH_CTL_SYNC_PULSE_SKL(32); >> + } else { >> + return DP_AUX_CH_CTL_SEND_BUSY | >> + DP_AUX_CH_CTL_DONE | >> + DP_AUX_CH_CTL_INTERRUPT | >> + DP_AUX_CH_CTL_TIME_OUT_ERROR | >> + DP_AUX_CH_CTL_TIME_OUT_MAX | >> + DP_AUX_CH_CTL_RECEIVE_ERROR | >> + (send_bytes << >> DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | >> + DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) | >> + DP_AUX_CH_CTL_SYNC_PULSE_SKL(32); >> + } >> } >> >> static int
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5530c47..7bdc214 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5558,6 +5558,7 @@ enum { #define DP_AUX_CH_CTL_PSR_DATA_AUX_REG_SKL (1 << 14) #define DP_AUX_CH_CTL_FS_DATA_AUX_REG_SKL (1 << 13) #define DP_AUX_CH_CTL_GTC_DATA_AUX_REG_SKL (1 << 12) +#define DP_AUX_CH_CTL_TBT_IO (1 << 11) #define DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL_MASK (0x1f << 5) #define DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(c) (((c) - 1) << 5) #define DP_AUX_CH_CTL_SYNC_PULSE_SKL(c) ((c) - 1) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index cc33d7c..90a8e2f 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1208,15 +1208,31 @@ static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp, int send_bytes, uint32_t unused) { - return DP_AUX_CH_CTL_SEND_BUSY | - DP_AUX_CH_CTL_DONE | - DP_AUX_CH_CTL_INTERRUPT | - DP_AUX_CH_CTL_TIME_OUT_ERROR | - DP_AUX_CH_CTL_TIME_OUT_MAX | - DP_AUX_CH_CTL_RECEIVE_ERROR | - (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | - DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) | - DP_AUX_CH_CTL_SYNC_PULSE_SKL(32); + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); + struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev); + + if (INTEL_GEN(dev_priv) >= 11 && intel_dig_port->tc_type == TC_PORT_TBT) { + return DP_AUX_CH_CTL_SEND_BUSY | + DP_AUX_CH_CTL_DONE | + DP_AUX_CH_CTL_INTERRUPT | + DP_AUX_CH_CTL_TIME_OUT_ERROR | + DP_AUX_CH_CTL_TIME_OUT_MAX | + DP_AUX_CH_CTL_RECEIVE_ERROR | + (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | + DP_AUX_CH_CTL_TBT_IO | + DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) | + DP_AUX_CH_CTL_SYNC_PULSE_SKL(32); + } else { + return DP_AUX_CH_CTL_SEND_BUSY | + DP_AUX_CH_CTL_DONE | + DP_AUX_CH_CTL_INTERRUPT | + DP_AUX_CH_CTL_TIME_OUT_ERROR | + DP_AUX_CH_CTL_TIME_OUT_MAX | + DP_AUX_CH_CTL_RECEIVE_ERROR | + (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) | + DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) | + DP_AUX_CH_CTL_SYNC_PULSE_SKL(32); + } } static int
For a TBT sequence, we need to set the IO type to TBT in DDI_AUX_CTL. Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_dp.c | 34 +++++++++++++++++++++++++--------- 2 files changed, 26 insertions(+), 9 deletions(-)