| Message ID | 1532648115-29795-1-git-send-email-anusha.srivatsa@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] drm/i915/icl: Add TBT checks for PLL calculations | expand |
Em Qui, 2018-07-26 às 16:35 -0700, Anusha Srivatsa escreveu: > Add missing TBT check in the Pll calculation. > > v2: do not use a auxiliary function to check if status is > TBT or not. (Paulo) > > v3: Code style changes. (Paulo) > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > drivers/gpu/drm/i915/intel_dpll_mgr.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c > b/drivers/gpu/drm/i915/intel_dpll_mgr.c > index 7e5e6eb..20c9068 100644 > --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c > @@ -2866,6 +2866,8 @@ static struct intel_shared_dpll * > icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state > *crtc_state, > struct intel_encoder *encoder) > { > + struct intel_digital_port *intel_dig_port = > + enc_to_dig_port(&encoder->base); > struct intel_shared_dpll *pll; > struct intel_dpll_hw_state pll_state = {}; > enum port port = encoder->port; > @@ -2885,7 +2887,7 @@ icl_get_dpll(struct intel_crtc *crtc, struct > intel_crtc_state *crtc_state, > case PORT_D: > case PORT_E: > case PORT_F: > - if (0 /* TODO: TBT PLLs */) { > + if (intel_dig_port->tc_type == TC_PORT_TBT) { > min = DPLL_ID_ICL_TBTPLL; > max = min; > ret = icl_calc_dpll_state(crtc_state, > encoder, clock,
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c index 7e5e6eb..20c9068 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c @@ -2866,6 +2866,8 @@ static struct intel_shared_dpll * icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, struct intel_encoder *encoder) { + struct intel_digital_port *intel_dig_port = + enc_to_dig_port(&encoder->base); struct intel_shared_dpll *pll; struct intel_dpll_hw_state pll_state = {}; enum port port = encoder->port; @@ -2885,7 +2887,7 @@ icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state, case PORT_D: case PORT_E: case PORT_F: - if (0 /* TODO: TBT PLLs */) { + if (intel_dig_port->tc_type == TC_PORT_TBT) { min = DPLL_ID_ICL_TBTPLL; max = min; ret = icl_calc_dpll_state(crtc_state, encoder, clock,
Add missing TBT check in the Pll calculation. v2: do not use a auxiliary function to check if status is TBT or not. (Paulo) v3: Code style changes. (Paulo) Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> --- drivers/gpu/drm/i915/intel_dpll_mgr.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)