Message ID | 1532685089-35645-5-git-send-email-biju.das@bp.renesas.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Simon Horman |
Headers | show |
Series | Add GPIO and EAVB Pinctrl support | expand |
Hi Biju, On Fri, Jul 27, 2018 at 11:57 AM Biju Das <biju.das@bp.renesas.com> wrote: > Adding pinctrl support for EtherAVB interface. > > Signed-off-by: Biju Das <biju.das@bp.renesas.com> > Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Thanks for the update! > --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts > +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts > @@ -46,6 +49,11 @@ > }; > > &pfc { > + avb_pins: avb { > + groups = "avb_mdio", "avb_gmii_tx_rx"; avb_crs is wired, but deemed unused, right? In that case: Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > + function = "avb"; > + }; > + > scif1_pins: scif1 { > groups = "scif1_data_b"; > function = "scif1"; Gr{oetje,eeting}s, Geert
Hi Geert, Thanks for the feedback. Subject: Re: [PATCH 4/4] ARM: dts: iwg23s-sbc: Add pinctl support for > > &pfc { > > + avb_pins: avb { > > + groups = "avb_mdio", "avb_gmii_tx_rx"; > > avb_crs is wired, but deemed unused, right? Yes, CRS is not used in full duplex mode. > In that case: > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > > > + function = "avb"; > > + }; > > + > > scif1_pins: scif1 { > > groups = "scif1_data_b"; > > function = "scif1"; > > Gr{oetje,eeting}s, > > Geert > Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts index 22da819..4ceff9c 100644 --- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts @@ -28,6 +28,9 @@ }; &avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + phy-handle = <&phy3>; phy-mode = "gmii"; renesas,no-ether-link; @@ -46,6 +49,11 @@ }; &pfc { + avb_pins: avb { + groups = "avb_mdio", "avb_gmii_tx_rx"; + function = "avb"; + }; + scif1_pins: scif1 { groups = "scif1_data_b"; function = "scif1";