| Message ID | 1533150747-30677-6-git-send-email-steve_longerbeam@mentor.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | None | expand |
On Wed, 2018-08-01 at 12:12 -0700, Steve Longerbeam wrote: > From: Philipp Zabel <p.zabel@pengutronix.de> > > The IPU also supports interlaced buffers that start with the bottom field. > To achieve this, the the base address EBA has to be increased by a stride > length and the interlace offset ILO has to be set to the negative stride. > > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> > Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> > --- > drivers/gpu/ipu-v3/ipu-cpmem.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c > index e68e473..8cd9e37 100644 > --- a/drivers/gpu/ipu-v3/ipu-cpmem.c > +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c > @@ -269,9 +269,20 @@ EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset); > > void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride) > { > + u32 ilo, sly; > + > + if (stride < 0) { > + stride = -stride; > + ilo = 0x100000 - (stride / 8); > + } else { > + ilo = stride / 8; > + } > + > + sly = (stride * 2) - 1; > + > ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); > - ipu_ch_param_write_field(ch, IPU_FIELD_ILO, stride / 8); > - ipu_ch_param_write_field(ch, IPU_FIELD_SLY, (stride * 2) - 1); > + ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo); > + ipu_ch_param_write_field(ch, IPU_FIELD_SLY, sly); > }; > EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan); This patch is merged in drm-next: 4e3c5d7e05be ("gpu: ipu-v3: Allow negative offsets for interlaced scanning") regards Philipp
Hi Philipp, On 08/02/2018 02:46 AM, Philipp Zabel wrote: > On Wed, 2018-08-01 at 12:12 -0700, Steve Longerbeam wrote: >> From: Philipp Zabel <p.zabel@pengutronix.de> >> >> The IPU also supports interlaced buffers that start with the bottom field. >> To achieve this, the the base address EBA has to be increased by a stride >> length and the interlace offset ILO has to be set to the negative stride. >> >> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> >> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> >> --- >> drivers/gpu/ipu-v3/ipu-cpmem.c | 15 +++++++++++++-- >> 1 file changed, 13 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c >> index e68e473..8cd9e37 100644 >> --- a/drivers/gpu/ipu-v3/ipu-cpmem.c >> +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c >> @@ -269,9 +269,20 @@ EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset); >> >> void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride) >> { >> + u32 ilo, sly; >> + >> + if (stride < 0) { >> + stride = -stride; >> + ilo = 0x100000 - (stride / 8); >> + } else { >> + ilo = stride / 8; >> + } >> + >> + sly = (stride * 2) - 1; >> + >> ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); >> - ipu_ch_param_write_field(ch, IPU_FIELD_ILO, stride / 8); >> - ipu_ch_param_write_field(ch, IPU_FIELD_SLY, (stride * 2) - 1); >> + ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo); >> + ipu_ch_param_write_field(ch, IPU_FIELD_SLY, sly); >> }; >> EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan); > This patch is merged in drm-next: 4e3c5d7e05be ("gpu: ipu-v3: Allow > negative offsets for interlaced scanning") I don't see it in drm-next, but I see it in linux-next/master. Thanks. Steve
diff --git a/drivers/gpu/ipu-v3/ipu-cpmem.c b/drivers/gpu/ipu-v3/ipu-cpmem.c index e68e473..8cd9e37 100644 --- a/drivers/gpu/ipu-v3/ipu-cpmem.c +++ b/drivers/gpu/ipu-v3/ipu-cpmem.c @@ -269,9 +269,20 @@ EXPORT_SYMBOL_GPL(ipu_cpmem_set_uv_offset); void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride) { + u32 ilo, sly; + + if (stride < 0) { + stride = -stride; + ilo = 0x100000 - (stride / 8); + } else { + ilo = stride / 8; + } + + sly = (stride * 2) - 1; + ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); - ipu_ch_param_write_field(ch, IPU_FIELD_ILO, stride / 8); - ipu_ch_param_write_field(ch, IPU_FIELD_SLY, (stride * 2) - 1); + ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo); + ipu_ch_param_write_field(ch, IPU_FIELD_SLY, sly); }; EXPORT_SYMBOL_GPL(ipu_cpmem_interlaced_scan);