| Message ID | 20180814044532.1832-2-anusha.srivatsa@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/1] firmware/dmc/icl: load v1.07 on icelake. | expand |
On Mon, Aug 13, 2018 at 11:45:32PM -0500, Anusha Srivatsa wrote: > Add Support to load DMC on Icelake. > > While at it, also add support to load the firmware > during system resume. > > v2: load firmware during system resume.(Imre) > > v3: enable has_csr for icelake.(Jyoti) > > Cc: Jyoti Yadav <jyoti.r.yadav@intel.com> > Cc: Imre Deak <imre.deak@intel.com> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > drivers/gpu/drm/i915/i915_pci.c | 2 +- > drivers/gpu/drm/i915/intel_csr.c | 7 +++++++ > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++ > 3 files changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index e931b48369dd..bbd331f1d5d9 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -600,7 +600,7 @@ static const struct intel_device_info intel_cannonlake_info = { > GEN10_FEATURES, \ > GEN(11), \ > .ddb_size = 2048, \ > - .has_csr = 0, \ > + .has_csr = 1, \ The default is correct already, so it's enough not to reinit this field. Also could you send this one change separately after the following patch is merged: https://patchwork.freedesktop.org/patch/244656/ That way we could see if not specifying the firmware doesn't break things. (This scenario is valid for a new platform.) Thanks, Imre > .has_logical_ring_elsq = 1 > > static const struct intel_device_info intel_icelake_11_info = { > diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c > index cf9b600cca79..393d419afb91 100644 > --- a/drivers/gpu/drm/i915/intel_csr.c > +++ b/drivers/gpu/drm/i915/intel_csr.c > @@ -34,6 +34,9 @@ > * low-power state and comes back to normal. > */ > > +#define I915_CSR_ICL "i915/icl_dmc_ver1_07.bin" > +#define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7) > + > #define I915_CSR_GLK "i915/glk_dmc_ver1_04.bin" > MODULE_FIRMWARE(I915_CSR_GLK); > #define GLK_CSR_VERSION_REQUIRED CSR_VERSION(1, 4) > @@ -301,6 +304,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, > if (csr->fw_path == i915_modparams.dmc_firmware_path) { > /* Bypass version check for firmware override. */ > required_version = csr->version; > + } else if (IS_ICELAKE(dev_priv)) { > + required_version = ICL_CSR_VERSION_REQUIRED; > } else if (IS_CANNONLAKE(dev_priv)) { > required_version = CNL_CSR_VERSION_REQUIRED; > } else if (IS_GEMINILAKE(dev_priv)) { > @@ -458,6 +463,8 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv) > > if (i915_modparams.dmc_firmware_path) > csr->fw_path = i915_modparams.dmc_firmware_path; > + else if (IS_ICELAKE(dev_priv)) > + csr->fw_path = I915_CSR_ICL; > else if (IS_CANNONLAKE(dev_priv)) > csr->fw_path = I915_CSR_CNL; > else if (IS_GEMINILAKE(dev_priv)) > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index e209edbc561d..7686f4d32533 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -3588,6 +3588,9 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, > > /* 7. Setup MBUS. */ > icl_mbus_init(dev_priv); > + > + if (resume && dev_priv->csr.dmc_payload) > + intel_csr_load_program(dev_priv); > } > > static void icl_display_core_uninit(struct drm_i915_private *dev_priv) > -- > 2.14.1 >
>-----Original Message----- >From: Deak, Imre >Sent: Wednesday, August 15, 2018 4:35 AM >To: Srivatsa, Anusha <anusha.srivatsa@intel.com> >Cc: intel-gfx@lists.freedesktop.org; Yadav, Jyoti R <jyoti.r.yadav@intel.com>; >Vivi, Rodrigo <rodrigo.vivi@intel.com>; Zanoni, Paulo R ><paulo.r.zanoni@intel.com> >Subject: Re: [PATCH 1/1] firmware/dmc/icl: load v1.07 on icelake. > >On Mon, Aug 13, 2018 at 11:45:32PM -0500, Anusha Srivatsa wrote: >> Add Support to load DMC on Icelake. >> >> While at it, also add support to load the firmware during system >> resume. >> >> v2: load firmware during system resume.(Imre) >> >> v3: enable has_csr for icelake.(Jyoti) >> >> Cc: Jyoti Yadav <jyoti.r.yadav@intel.com> >> Cc: Imre Deak <imre.deak@intel.com> >> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> >> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> >> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> >> --- >> drivers/gpu/drm/i915/i915_pci.c | 2 +- >> drivers/gpu/drm/i915/intel_csr.c | 7 +++++++ >> drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++ >> 3 files changed, 11 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_pci.c >> b/drivers/gpu/drm/i915/i915_pci.c index e931b48369dd..bbd331f1d5d9 >> 100644 >> --- a/drivers/gpu/drm/i915/i915_pci.c >> +++ b/drivers/gpu/drm/i915/i915_pci.c >> @@ -600,7 +600,7 @@ static const struct intel_device_info >intel_cannonlake_info = { >> GEN10_FEATURES, \ >> GEN(11), \ >> .ddb_size = 2048, \ >> - .has_csr = 0, \ >> + .has_csr = 1, \ > >The default is correct already, so it's enough not to reinit this field. >Also could you send this one change separately after the following patch is >merged: >https://patchwork.freedesktop.org/patch/244656/ > >That way we could see if not specifying the firmware doesn't break things. (This >scenario is valid for a new platform.) > Sure. Thanks Imre. Anusha >Thanks, >Imre > >> .has_logical_ring_elsq = 1 >> >> static const struct intel_device_info intel_icelake_11_info = { diff >> --git a/drivers/gpu/drm/i915/intel_csr.c >> b/drivers/gpu/drm/i915/intel_csr.c >> index cf9b600cca79..393d419afb91 100644 >> --- a/drivers/gpu/drm/i915/intel_csr.c >> +++ b/drivers/gpu/drm/i915/intel_csr.c >> @@ -34,6 +34,9 @@ >> * low-power state and comes back to normal. >> */ >> >> +#define I915_CSR_ICL "i915/icl_dmc_ver1_07.bin" >> +#define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7) >> + >> #define I915_CSR_GLK "i915/glk_dmc_ver1_04.bin" >> MODULE_FIRMWARE(I915_CSR_GLK); >> #define GLK_CSR_VERSION_REQUIRED CSR_VERSION(1, 4) >> @@ -301,6 +304,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private >*dev_priv, >> if (csr->fw_path == i915_modparams.dmc_firmware_path) { >> /* Bypass version check for firmware override. */ >> required_version = csr->version; >> + } else if (IS_ICELAKE(dev_priv)) { >> + required_version = ICL_CSR_VERSION_REQUIRED; >> } else if (IS_CANNONLAKE(dev_priv)) { >> required_version = CNL_CSR_VERSION_REQUIRED; >> } else if (IS_GEMINILAKE(dev_priv)) { @@ -458,6 +463,8 @@ void >> intel_csr_ucode_init(struct drm_i915_private *dev_priv) >> >> if (i915_modparams.dmc_firmware_path) >> csr->fw_path = i915_modparams.dmc_firmware_path; >> + else if (IS_ICELAKE(dev_priv)) >> + csr->fw_path = I915_CSR_ICL; >> else if (IS_CANNONLAKE(dev_priv)) >> csr->fw_path = I915_CSR_CNL; >> else if (IS_GEMINILAKE(dev_priv)) >> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c >> b/drivers/gpu/drm/i915/intel_runtime_pm.c >> index e209edbc561d..7686f4d32533 100644 >> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c >> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c >> @@ -3588,6 +3588,9 @@ static void icl_display_core_init(struct >> drm_i915_private *dev_priv, >> >> /* 7. Setup MBUS. */ >> icl_mbus_init(dev_priv); >> + >> + if (resume && dev_priv->csr.dmc_payload) >> + intel_csr_load_program(dev_priv); >> } >> >> static void icl_display_core_uninit(struct drm_i915_private >> *dev_priv) >> -- >> 2.14.1 >>
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index e931b48369dd..bbd331f1d5d9 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -600,7 +600,7 @@ static const struct intel_device_info intel_cannonlake_info = { GEN10_FEATURES, \ GEN(11), \ .ddb_size = 2048, \ - .has_csr = 0, \ + .has_csr = 1, \ .has_logical_ring_elsq = 1 static const struct intel_device_info intel_icelake_11_info = { diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index cf9b600cca79..393d419afb91 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -34,6 +34,9 @@ * low-power state and comes back to normal. */ +#define I915_CSR_ICL "i915/icl_dmc_ver1_07.bin" +#define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7) + #define I915_CSR_GLK "i915/glk_dmc_ver1_04.bin" MODULE_FIRMWARE(I915_CSR_GLK); #define GLK_CSR_VERSION_REQUIRED CSR_VERSION(1, 4) @@ -301,6 +304,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv, if (csr->fw_path == i915_modparams.dmc_firmware_path) { /* Bypass version check for firmware override. */ required_version = csr->version; + } else if (IS_ICELAKE(dev_priv)) { + required_version = ICL_CSR_VERSION_REQUIRED; } else if (IS_CANNONLAKE(dev_priv)) { required_version = CNL_CSR_VERSION_REQUIRED; } else if (IS_GEMINILAKE(dev_priv)) { @@ -458,6 +463,8 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv) if (i915_modparams.dmc_firmware_path) csr->fw_path = i915_modparams.dmc_firmware_path; + else if (IS_ICELAKE(dev_priv)) + csr->fw_path = I915_CSR_ICL; else if (IS_CANNONLAKE(dev_priv)) csr->fw_path = I915_CSR_CNL; else if (IS_GEMINILAKE(dev_priv)) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index e209edbc561d..7686f4d32533 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -3588,6 +3588,9 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, /* 7. Setup MBUS. */ icl_mbus_init(dev_priv); + + if (resume && dev_priv->csr.dmc_payload) + intel_csr_load_program(dev_priv); } static void icl_display_core_uninit(struct drm_i915_private *dev_priv)
Add Support to load DMC on Icelake. While at it, also add support to load the firmware during system resume. v2: load firmware during system resume.(Imre) v3: enable has_csr for icelake.(Jyoti) Cc: Jyoti Yadav <jyoti.r.yadav@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 2 +- drivers/gpu/drm/i915/intel_csr.c | 7 +++++++ drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++ 3 files changed, 11 insertions(+), 1 deletion(-)