| Message ID | 1534808533-155146-1-git-send-email-azhar.shaikh@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v3] drm/i915/psr: Add PSR mode/revision to debugfs | expand |
On Mon, 2018-08-20 at 16:42 -0700, Azhar Shaikh wrote: > Log the PSR mode/revision (PSR1 or PSR2) in the debugfs file > i915_edp_psr_status. > > Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com> > --- > Changes in v3: > - rebased > > Changes in v2: > - Fix checkpatch warning. > - Add Reviewed-by: from v1 > > drivers/gpu/drm/i915/i915_debugfs.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > b/drivers/gpu/drm/i915/i915_debugfs.c > index 26b7e5276b15..bb94ed33a7da 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2708,7 +2708,9 @@ static int i915_edp_psr_status(struct seq_file > *m, void *data) > intel_runtime_pm_get(dev_priv); > > mutex_lock(&dev_priv->psr.lock); > - seq_printf(m, "Enabled: %s\n", yesno(dev_priv- > >psr.enabled)); > + seq_printf(m, "PSR mode: %s\n", > + dev_priv->psr.psr2_enabled ? "PSR2" : "PSR1"); > + seq_printf(m, "Enabled: %s\n", yesno((bool)dev_priv- > >psr.enabled)); I'm afraid this rebase isn't correct, the patch is reverting to use a bool typecast for no particular reason. > seq_printf(m, "Busy frontbuffer bits: 0x%03x\n", > dev_priv->psr.busy_frontbuffer_bits); >
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 26b7e5276b15..bb94ed33a7da 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2708,7 +2708,9 @@ static int i915_edp_psr_status(struct seq_file *m, void *data) intel_runtime_pm_get(dev_priv); mutex_lock(&dev_priv->psr.lock); - seq_printf(m, "Enabled: %s\n", yesno(dev_priv->psr.enabled)); + seq_printf(m, "PSR mode: %s\n", + dev_priv->psr.psr2_enabled ? "PSR2" : "PSR1"); + seq_printf(m, "Enabled: %s\n", yesno((bool)dev_priv->psr.enabled)); seq_printf(m, "Busy frontbuffer bits: 0x%03x\n", dev_priv->psr.busy_frontbuffer_bits);
Log the PSR mode/revision (PSR1 or PSR2) in the debugfs file i915_edp_psr_status. Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com> --- Changes in v3: - rebased Changes in v2: - Fix checkpatch warning. - Add Reviewed-by: from v1 drivers/gpu/drm/i915/i915_debugfs.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)