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[04/18] drm/i915: Use pipe A primary plane .max_stride() as the global stride limit

Message ID 20180719182214.4323-5-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä July 19, 2018, 6:22 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Let's assume that the primary plane for pipe A has the highest max
stride of all planes, and we'll use that as the global limit when
creating a new framebuffer.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 33 ++++++++++-----------------------
 1 file changed, 10 insertions(+), 23 deletions(-)

Comments

Souza, Jose Aug. 22, 2018, 10:22 p.m. UTC | #1
On Thu, 2018-07-19 at 21:22 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Let's assume that the primary plane for pipe A has the highest max
> stride of all planes, and we'll use that as the global limit when
> creating a new framebuffer.

Well it was already assuming that but using the new max_stride hook is
way better.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 33 ++++++++++--------------
> ---------
>  1 file changed, 10 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index a09e11e0596f..994685230b97 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14399,31 +14399,18 @@ static
>  u32 intel_fb_pitch_limit(struct drm_i915_private *dev_priv,
>  			 uint64_t fb_modifier, uint32_t pixel_format)
>  {
> -	u32 gen = INTEL_GEN(dev_priv);
> +	struct intel_crtc *crtc;
> +	struct intel_plane *plane;
>  
> -	if (gen >= 9) {
> -		int cpp = drm_format_plane_cpp(pixel_format, 0);
> +	/*
> +	 * We assume the primary plane for pipe A has
> +	 * the highest stride limits of them all.
> +	 */
> +	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
> +	plane = to_intel_plane(crtc->base.primary);
>  
> -		/* "The stride in bytes must not exceed the of the size
> of 8K
> -		 *  pixels and 32K bytes."
> -		 */
> -		return min(8192 * cpp, 32768);
> -	} else if (gen >= 5 && !HAS_GMCH_DISPLAY(dev_priv)) {
> -		return 32*1024;
> -	} else if (gen >= 4) {
> -		if (fb_modifier == I915_FORMAT_MOD_X_TILED)
> -			return 16*1024;
> -		else
> -			return 32*1024;
> -	} else if (gen >= 3) {
> -		if (fb_modifier == I915_FORMAT_MOD_X_TILED)
> -			return 8*1024;
> -		else
> -			return 16*1024;
> -	} else {
> -		/* XXX DSPC is limited to 4k tiled */
> -		return 8*1024;
> -	}
> +	return plane->max_stride(plane, pixel_format, fb_modifier,
> +				 DRM_MODE_ROTATE_0);
>  }
>  
>  static int intel_framebuffer_init(struct intel_framebuffer
> *intel_fb,
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a09e11e0596f..994685230b97 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14399,31 +14399,18 @@  static
 u32 intel_fb_pitch_limit(struct drm_i915_private *dev_priv,
 			 uint64_t fb_modifier, uint32_t pixel_format)
 {
-	u32 gen = INTEL_GEN(dev_priv);
+	struct intel_crtc *crtc;
+	struct intel_plane *plane;
 
-	if (gen >= 9) {
-		int cpp = drm_format_plane_cpp(pixel_format, 0);
+	/*
+	 * We assume the primary plane for pipe A has
+	 * the highest stride limits of them all.
+	 */
+	crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_A);
+	plane = to_intel_plane(crtc->base.primary);
 
-		/* "The stride in bytes must not exceed the of the size of 8K
-		 *  pixels and 32K bytes."
-		 */
-		return min(8192 * cpp, 32768);
-	} else if (gen >= 5 && !HAS_GMCH_DISPLAY(dev_priv)) {
-		return 32*1024;
-	} else if (gen >= 4) {
-		if (fb_modifier == I915_FORMAT_MOD_X_TILED)
-			return 16*1024;
-		else
-			return 32*1024;
-	} else if (gen >= 3) {
-		if (fb_modifier == I915_FORMAT_MOD_X_TILED)
-			return 8*1024;
-		else
-			return 16*1024;
-	} else {
-		/* XXX DSPC is limited to 4k tiled */
-		return 8*1024;
-	}
+	return plane->max_stride(plane, pixel_format, fb_modifier,
+				 DRM_MODE_ROTATE_0);
 }
 
 static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,