diff mbox series

drm/i915: Simplify condition to keep DMC active during S0ix

Message ID 20180822112602.27543-1-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Simplify condition to keep DMC active during S0ix | expand

Commit Message

Imre Deak Aug. 22, 2018, 11:26 a.m. UTC
For S0ix we want to deinit power domains (and so deactivate the DMC
firmware) exactly when the platform supports the DC9 state. To reach
S0ix we need DC9 on these platforms (for which the DMC FW needs to be
deactivated) while to reach S0ix on the rest of the DMC platforms we
need DC6 (which needs the DMC FW to stay active).

Simplify the condition accordingly so it will be automatically
correct for upcoming DC9 platforms like ICL.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

Comments

Ville Syrjälä Aug. 22, 2018, 12:27 p.m. UTC | #1
On Wed, Aug 22, 2018 at 02:26:02PM +0300, Imre Deak wrote:
> For S0ix we want to deinit power domains (and so deactivate the DMC
> firmware) exactly when the platform supports the DC9 state. To reach
> S0ix we need DC9 on these platforms (for which the DMC FW needs to be
> deactivated) while to reach S0ix on the rest of the DMC platforms we
> need DC6 (which needs the DMC FW to stay active).
> 
> Simplify the condition accordingly so it will be automatically
> correct for upcoming DC9 platforms like ICL.
> 
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 13 +++++++------
>  1 file changed, 7 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index ff3fd8dbd2b4..1b10b7041513 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -3848,13 +3848,14 @@ void intel_power_domains_suspend(struct drm_i915_private *dev_priv,
>  	intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
>  
>  	/*
> -	 * In case of firmware assisted context save/restore don't manually
> -	 * deinit the power domains. This also means the CSR/DMC firmware will
> -	 * stay active, it will power down any HW resources as required and
> -	 * also enable deeper system power states that would be blocked if the
> -	 * firmware was inactive.
> +	 * In case of suspend-to-idle (aka S0ix) on a DMC platform without DC9
> +	 * support don't manually deinit the power domains. This also means the
> +	 * CSR/DMC firmware will stay active, it will power down any HW
> +	 * resources as required and also enable deeper system power states
> +	 * that would be blocked if the firmware was inactive.
>  	 */
> -	if (!IS_GEN9_LP(dev_priv) && suspend_mode == I915_DRM_SUSPEND_IDLE &&
> +	if (!(dev_priv->csr.allowed_dc_mask & DC_STATE_EN_DC9) &&
> +	    suspend_mode == I915_DRM_SUSPEND_IDLE &&
>  	    dev_priv->csr.dmc_payload != NULL) {
>  		intel_power_domains_verify_state(dev_priv);
>  		return;
> -- 
> 2.13.2
Imre Deak Aug. 23, 2018, 1:14 p.m. UTC | #2
On Wed, Aug 22, 2018 at 12:43:00PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Simplify condition to keep DMC active during S0ix
> URL   : https://patchwork.freedesktop.org/series/48556/
> State : success

Pushed to -dinq, thanks for the review.

> 
> == Summary ==
> 
> = CI Bug Log - changes from CI_DRM_4695_full -> Patchwork_9989_full =
> 
> == Summary - SUCCESS ==
> 
>   No regressions found.
> 
>   
> 
> == Known issues ==
> 
>   Here are the changes found in Patchwork_9989_full that come from known issues:
> 
>   === IGT changes ===
> 
>     ==== Issues hit ====
> 
>     igt@gem_ctx_isolation@vcs1-s3:
>       shard-kbl:          PASS -> INCOMPLETE (fdo#103665)
> 
>     
>     ==== Possible fixes ====
> 
>     igt@kms_flip@flip-vs-expired-vblank:
>       shard-glk:          FAIL (fdo#105363) -> PASS
> 
>     
>   fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
>   fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
> 
> 
> == Participating hosts (5 -> 5) ==
> 
>   No changes in participating hosts
> 
> 
> == Build changes ==
> 
>     * Linux: CI_DRM_4695 -> Patchwork_9989
> 
>   CI_DRM_4695: f352837700ec39dbaf00cdf727650851993d754b @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_4608: 94ebd21177feedf03e8f6dd1e73dca1a6ec7a0ac @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_9989: 2c35976d2b8127d127729694fe0295a61ee2d685 @ git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9989/shards.html
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index ff3fd8dbd2b4..1b10b7041513 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3848,13 +3848,14 @@  void intel_power_domains_suspend(struct drm_i915_private *dev_priv,
 	intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
 
 	/*
-	 * In case of firmware assisted context save/restore don't manually
-	 * deinit the power domains. This also means the CSR/DMC firmware will
-	 * stay active, it will power down any HW resources as required and
-	 * also enable deeper system power states that would be blocked if the
-	 * firmware was inactive.
+	 * In case of suspend-to-idle (aka S0ix) on a DMC platform without DC9
+	 * support don't manually deinit the power domains. This also means the
+	 * CSR/DMC firmware will stay active, it will power down any HW
+	 * resources as required and also enable deeper system power states
+	 * that would be blocked if the firmware was inactive.
 	 */
-	if (!IS_GEN9_LP(dev_priv) && suspend_mode == I915_DRM_SUSPEND_IDLE &&
+	if (!(dev_priv->csr.allowed_dc_mask & DC_STATE_EN_DC9) &&
+	    suspend_mode == I915_DRM_SUSPEND_IDLE &&
 	    dev_priv->csr.dmc_payload != NULL) {
 		intel_power_domains_verify_state(dev_priv);
 		return;