Message ID | 1535033596-22351-1-git-send-email-fabrizio.castro@bp.renesas.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: dts: renesas: r8a774a1: Add pinctrl device node | expand |
On Thu, Aug 23, 2018 at 03:13:16PM +0100, Fabrizio Castro wrote: > This patch adds pinctrl device node for R8A774A1 SoC. > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > Reviewed-by: Biju Das <biju.das@bp.renesas.com> > --- > > This patch depends on: > https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg30339.html > https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg30539.html Thanks, This looks fine to me but I will wait to see if there are other reviews before applying. Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
On Mon, Aug 27, 2018 at 09:47:37AM +0200, Simon Horman wrote: > On Thu, Aug 23, 2018 at 03:13:16PM +0100, Fabrizio Castro wrote: > > This patch adds pinctrl device node for R8A774A1 SoC. > > > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > Reviewed-by: Biju Das <biju.das@bp.renesas.com> > > --- > > > > This patch depends on: > > https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg30339.html > > https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg30539.html > > Thanks, > > This looks fine to me but I will wait to see if there are other reviews > before applying. Thanks again, applied for v4.20.
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index 5b2ee60..b9d2da4 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -200,6 +200,11 @@ status = "disabled"; }; + pfc: pin-controller@e6060000 { + compatible = "renesas,pfc-r8a774a1"; + reg = <0 0xe6060000 0 0x50c>; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a774a1-cpg-mssr"; reg = <0 0xe6150000 0 0x0bb0>;