diff mbox series

spi: dw-mmio: avoid hardcoded field mask

Message ID 20180831114046.27094-1-alexandre.belloni@bootlin.com (mailing list archive)
State Accepted
Commit c1d8b0825d50e1eb6b6ea2cb9e450637dba9b4e2
Headers show
Series spi: dw-mmio: avoid hardcoded field mask | expand

Commit Message

Alexandre Belloni Aug. 31, 2018, 11:40 a.m. UTC
Define a mask for the IF_SI_OWNER field.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
 drivers/spi/spi-dw-mmio.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Andy Shevchenko Aug. 31, 2018, 11:54 a.m. UTC | #1
On Fri, Aug 31, 2018 at 01:40:46PM +0200, Alexandre Belloni wrote:
> Define a mask for the IF_SI_OWNER field.
> 

Thanks!

Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
> ---
>  drivers/spi/spi-dw-mmio.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
> index 351f49976161..a768461614a0 100644
> --- a/drivers/spi/spi-dw-mmio.c
> +++ b/drivers/spi/spi-dw-mmio.c
> @@ -36,6 +36,7 @@ struct dw_spi_mmio {
>  #define MSCC_CPU_SYSTEM_CTRL_GENERAL_CTRL	0x24
>  #define OCELOT_IF_SI_OWNER_OFFSET		4
>  #define JAGUAR2_IF_SI_OWNER_OFFSET		6
> +#define MSCC_IF_SI_OWNER_MASK			GENMASK(1, 0)
>  #define MSCC_IF_SI_OWNER_SISL			0
>  #define MSCC_IF_SI_OWNER_SIBM			1
>  #define MSCC_IF_SI_OWNER_SIMC			2
> @@ -102,7 +103,7 @@ static int dw_spi_mscc_init(struct platform_device *pdev,
>  
>  	/* Select the owner of the SI interface */
>  	regmap_update_bits(dwsmscc->syscon, MSCC_CPU_SYSTEM_CTRL_GENERAL_CTRL,
> -			   0x3 << if_si_owner_offset,
> +			   MSCC_IF_SI_OWNER_MASK << if_si_owner_offset,
>  			   MSCC_IF_SI_OWNER_SIMC << if_si_owner_offset);
>  
>  	dwsmmio->dws.set_cs = dw_spi_mscc_set_cs;
> -- 
> 2.19.0.rc1
>
diff mbox series

Patch

diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
index 351f49976161..a768461614a0 100644
--- a/drivers/spi/spi-dw-mmio.c
+++ b/drivers/spi/spi-dw-mmio.c
@@ -36,6 +36,7 @@  struct dw_spi_mmio {
 #define MSCC_CPU_SYSTEM_CTRL_GENERAL_CTRL	0x24
 #define OCELOT_IF_SI_OWNER_OFFSET		4
 #define JAGUAR2_IF_SI_OWNER_OFFSET		6
+#define MSCC_IF_SI_OWNER_MASK			GENMASK(1, 0)
 #define MSCC_IF_SI_OWNER_SISL			0
 #define MSCC_IF_SI_OWNER_SIBM			1
 #define MSCC_IF_SI_OWNER_SIMC			2
@@ -102,7 +103,7 @@  static int dw_spi_mscc_init(struct platform_device *pdev,
 
 	/* Select the owner of the SI interface */
 	regmap_update_bits(dwsmscc->syscon, MSCC_CPU_SYSTEM_CTRL_GENERAL_CTRL,
-			   0x3 << if_si_owner_offset,
+			   MSCC_IF_SI_OWNER_MASK << if_si_owner_offset,
 			   MSCC_IF_SI_OWNER_SIMC << if_si_owner_offset);
 
 	dwsmmio->dws.set_cs = dw_spi_mscc_set_cs;