diff mbox series

drm/i915/intel_csr.c Added ICL Stepping info.

Message ID 1535960713-13679-1-git-send-email-jyoti.r.yadav@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/intel_csr.c Added ICL Stepping info. | expand

Commit Message

Yadav, Jyoti R Sept. 3, 2018, 7:45 a.m. UTC
As DMC Package contain DMC FW for multiple steppings including default
stepping. This patch will help to load FW for that particular stepping,
if FW for that stepping is available, instead of loading default FW.

Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
---
 drivers/gpu/drm/i915/intel_csr.c | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Rodrigo Vivi Sept. 4, 2018, 5:31 a.m. UTC | #1
On Mon, Sep 03, 2018 at 03:45:13AM -0400, Jyoti Yadav wrote:
> As DMC Package contain DMC FW for multiple steppings including default
> stepping. This patch will help to load FW for that particular stepping,
> if FW for that stepping is available, instead of loading default FW.
> 

Cc: Imre Deak <imre.deak@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>

I'm not sure if I can properly review this, but based on previous
platforms patch lgtm.

Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

I'm just not pushing because I'd like an ack from Anusha and/or Imre.

> ---
>  drivers/gpu/drm/i915/intel_csr.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> index 1ec4f09..f6352ab 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -183,6 +183,11 @@ struct stepping_info {
>  	{'A', '0'}, {'A', '1'}, {'A', '2'},
>  	{'B', '0'}, {'B', '1'}, {'B', '2'}
>  };

nip by checkpatch: missing blank line here.

> +static const struct stepping_info icl_stepping_info[] = {
> +	{'A', '0'}, {'A', '1'}, {'A', '2'},
> +	{'B', '0'}, {'B', '2'},
> +	{'C', '0'}
> +};
>  
>  static const struct stepping_info no_stepping_info = { '*', '*' };
>  
> @@ -198,6 +203,9 @@ struct stepping_info {
>  	} else if (IS_BROXTON(dev_priv)) {
>  		size = ARRAY_SIZE(bxt_stepping_info);
>  		si = bxt_stepping_info;
> +	} else if (IS_ICELAKE(dev_priv)) {
> +		size = ARRAY_SIZE(icl_stepping_info);
> +		si = icl_stepping_info;
>  	} else {
>  		size = 0;
>  		si = NULL;
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Yadav, Jyoti R Sept. 4, 2018, 5:39 a.m. UTC | #2
Yeah, Thanks for the "Acked-by" Rodrigo.

I request Imre/Anusha to review/acknowledge the same.

Regards
Jyoti

-----Original Message-----
From: Vivi, Rodrigo 
Sent: Tuesday, September 4, 2018 11:02 AM
To: Yadav, Jyoti R <jyoti.r.yadav@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] [intel-gfx] drm/i915/intel_csr.c Added ICL Stepping info.

On Mon, Sep 03, 2018 at 03:45:13AM -0400, Jyoti Yadav wrote:
> As DMC Package contain DMC FW for multiple steppings including default 
> stepping. This patch will help to load FW for that particular 
> stepping, if FW for that stepping is available, instead of loading default FW.
> 

Cc: Imre Deak <imre.deak@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>

I'm not sure if I can properly review this, but based on previous platforms patch lgtm.

Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

I'm just not pushing because I'd like an ack from Anusha and/or Imre.

> ---
>  drivers/gpu/drm/i915/intel_csr.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_csr.c 
> b/drivers/gpu/drm/i915/intel_csr.c
> index 1ec4f09..f6352ab 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -183,6 +183,11 @@ struct stepping_info {
>  	{'A', '0'}, {'A', '1'}, {'A', '2'},
>  	{'B', '0'}, {'B', '1'}, {'B', '2'}
>  };

nip by checkpatch: missing blank line here.

> +static const struct stepping_info icl_stepping_info[] = {
> +	{'A', '0'}, {'A', '1'}, {'A', '2'},
> +	{'B', '0'}, {'B', '2'},
> +	{'C', '0'}
> +};
>  
>  static const struct stepping_info no_stepping_info = { '*', '*' };
>  
> @@ -198,6 +203,9 @@ struct stepping_info {
>  	} else if (IS_BROXTON(dev_priv)) {
>  		size = ARRAY_SIZE(bxt_stepping_info);
>  		si = bxt_stepping_info;
> +	} else if (IS_ICELAKE(dev_priv)) {
> +		size = ARRAY_SIZE(icl_stepping_info);
> +		si = icl_stepping_info;
>  	} else {
>  		size = 0;
>  		si = NULL;
> --
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Imre Deak Sept. 5, 2018, 12:05 p.m. UTC | #3
On Mon, Sep 03, 2018 at 03:45:13AM -0400, Jyoti Yadav wrote:
> As DMC Package contain DMC FW for multiple steppings including default
> stepping. This patch will help to load FW for that particular stepping,
> if FW for that stepping is available, instead of loading default FW.
> 
> Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_csr.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> index 1ec4f09..f6352ab 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -183,6 +183,11 @@ struct stepping_info {
>  	{'A', '0'}, {'A', '1'}, {'A', '2'},
>  	{'B', '0'}, {'B', '1'}, {'B', '2'}
>  };
> +static const struct stepping_info icl_stepping_info[] = {
> +	{'A', '0'}, {'A', '1'}, {'A', '2'},

Looks like the PCI revision ID for A1 and A2 is missing/typoed in BSpec,
but these are probably the correct values in any case. The current
firmware has an 'A','*' entry for all A steppings, so that works out
too.

> +	{'B', '0'}, {'B', '2'},
> +	{'C', '0'}
> +};
>  
>  static const struct stepping_info no_stepping_info = { '*', '*' };
>  
> @@ -198,6 +203,9 @@ struct stepping_info {
>  	} else if (IS_BROXTON(dev_priv)) {
>  		size = ARRAY_SIZE(bxt_stepping_info);
>  		si = bxt_stepping_info;
> +	} else if (IS_ICELAKE(dev_priv)) {
> +		size = ARRAY_SIZE(icl_stepping_info);
> +		si = icl_stepping_info;

While fixing the formatting asked by Rodrigo, could you also keep the
new->old platform order and so make this and icl_stepping_info be the
first in the list?

With those looks ok:
Reviewed-by: Imre Deak <imre.deak@intel.com>

>  	} else {
>  		size = 0;
>  		si = NULL;
> -- 
> 1.9.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 1ec4f09..f6352ab 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -183,6 +183,11 @@  struct stepping_info {
 	{'A', '0'}, {'A', '1'}, {'A', '2'},
 	{'B', '0'}, {'B', '1'}, {'B', '2'}
 };
+static const struct stepping_info icl_stepping_info[] = {
+	{'A', '0'}, {'A', '1'}, {'A', '2'},
+	{'B', '0'}, {'B', '2'},
+	{'C', '0'}
+};
 
 static const struct stepping_info no_stepping_info = { '*', '*' };
 
@@ -198,6 +203,9 @@  struct stepping_info {
 	} else if (IS_BROXTON(dev_priv)) {
 		size = ARRAY_SIZE(bxt_stepping_info);
 		si = bxt_stepping_info;
+	} else if (IS_ICELAKE(dev_priv)) {
+		size = ARRAY_SIZE(icl_stepping_info);
+		si = icl_stepping_info;
 	} else {
 		size = 0;
 		si = NULL;