diff mbox series

drm/i915: optimzie eDP 1.4 config

Message ID 1536072941-888-1-git-send-email-shawn.c.lee@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: optimzie eDP 1.4 config | expand

Commit Message

Lee, Shawn C Sept. 4, 2018, 2:55 p.m. UTC
eDP 1.4 introduce a new link rates flexibility and selection.
It provided system specific link rate optimization and power
efficiency. We should keep eDP 1.3 and older version to use
max link rate approach to avoid any side effect. And eDP 1.4
used the optimization link rate and lane count setting.

Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Chris Wilson Sept. 4, 2018, 2:28 p.m. UTC | #1
Quoting Lee, Shawn C (2018-09-04 15:55:41)
> eDP 1.4 introduce a new link rates flexibility and selection.
> It provided system specific link rate optimization and power
> efficiency. We should keep eDP 1.3 and older version to use
> max link rate approach to avoid any side effect. And eDP 1.4
> used the optimization link rate and lane count setting.
> 
> Cc: Matt Atwood <matthew.s.atwood@intel.com>
> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 436c22de33b6..903d640fe712 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1953,8 +1953,10 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>                  * configuration, and typically these values correspond to the
>                  * native resolution of the panel.
>                  */

Having just finished a comment explaining why we override the limits for
eDP, the following logic is confusing without at least a mention above.

> -               limits.min_lane_count = limits.max_lane_count;
> -               limits.min_clock = limits.max_clock;
> +               if (intel_dp->edp_dpcd[0] <= DP_EDP_13) {
> +                       limits.min_lane_count = limits.max_lane_count;
> +                       limits.min_clock = limits.max_clock;
> +               }
>         }
>  
>         intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
> -- 
> 2.7.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Jani Nikula Sept. 5, 2018, 9:58 a.m. UTC | #2
On Tue, 04 Sep 2018, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> Quoting Lee, Shawn C (2018-09-04 15:55:41)
>> eDP 1.4 introduce a new link rates flexibility and selection.
>> It provided system specific link rate optimization and power
>> efficiency. We should keep eDP 1.3 and older version to use
>> max link rate approach to avoid any side effect. And eDP 1.4
>> used the optimization link rate and lane count setting.
>> 
>> Cc: Matt Atwood <matthew.s.atwood@intel.com>
>> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
>>  1 file changed, 4 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> index 436c22de33b6..903d640fe712 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -1953,8 +1953,10 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>>                  * configuration, and typically these values correspond to the
>>                  * native resolution of the panel.
>>                  */
>
> Having just finished a comment explaining why we override the limits for
> eDP, the following logic is confusing without at least a mention above.

I think the proper approach with the appropriate explanations is [1]. I
think it's harmful to start optimizing on eDP 1.4 without also
optimizing for fast and narrow link per spec at the same time.

BR,
Jani.


[1] http://patchwork.freedesktop.org/patch/msgid/20180905095321.13843-1-jani.nikula@intel.com



>
>> -               limits.min_lane_count = limits.max_lane_count;
>> -               limits.min_clock = limits.max_clock;
>> +               if (intel_dp->edp_dpcd[0] <= DP_EDP_13) {
>> +                       limits.min_lane_count = limits.max_lane_count;
>> +                       limits.min_clock = limits.max_clock;
>> +               }
>>         }
>>  
>>         intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
>> -- 
>> 2.7.4
>> 
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Jani Nikula Sept. 5, 2018, 9:58 a.m. UTC | #3
On Tue, 04 Sep 2018, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> Quoting Lee, Shawn C (2018-09-04 15:55:41)
>> eDP 1.4 introduce a new link rates flexibility and selection.
>> It provided system specific link rate optimization and power
>> efficiency. We should keep eDP 1.3 and older version to use
>> max link rate approach to avoid any side effect. And eDP 1.4
>> used the optimization link rate and lane count setting.
>> 
>> Cc: Matt Atwood <matthew.s.atwood@intel.com>
>> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_dp.c | 6 ++++--
>>  1 file changed, 4 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> index 436c22de33b6..903d640fe712 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -1953,8 +1953,10 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>>                  * configuration, and typically these values correspond to the
>>                  * native resolution of the panel.
>>                  */
>
> Having just finished a comment explaining why we override the limits for
> eDP, the following logic is confusing without at least a mention above.

I think the proper approach with the appropriate explanations is [1]. I
think it's harmful to start optimizing on eDP 1.4 without also
optimizing for fast and narrow link per spec at the same time.

BR,
Jani.


[1] http://patchwork.freedesktop.org/patch/msgid/20180905095321.13843-1-jani.nikula@intel.com



>
>> -               limits.min_lane_count = limits.max_lane_count;
>> -               limits.min_clock = limits.max_clock;
>> +               if (intel_dp->edp_dpcd[0] <= DP_EDP_13) {
>> +                       limits.min_lane_count = limits.max_lane_count;
>> +                       limits.min_clock = limits.max_clock;
>> +               }
>>         }
>>  
>>         intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
>> -- 
>> 2.7.4
>> 
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 436c22de33b6..903d640fe712 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1953,8 +1953,10 @@  intel_dp_compute_link_config(struct intel_encoder *encoder,
 		 * configuration, and typically these values correspond to the
 		 * native resolution of the panel.
 		 */
-		limits.min_lane_count = limits.max_lane_count;
-		limits.min_clock = limits.max_clock;
+		if (intel_dp->edp_dpcd[0] <= DP_EDP_13) {
+			limits.min_lane_count = limits.max_lane_count;
+			limits.min_clock = limits.max_clock;
+		}
 	}
 
 	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);