mbox series

[0/5] Decode memdev info and bandwidth and implemnt latency WA

Message ID 20180824093225.12598-1-mahesh1.kumar@intel.com (mailing list archive)
Headers show
Series Decode memdev info and bandwidth and implemnt latency WA | expand

Message

Kumar, Mahesh Aug. 24, 2018, 9:32 a.m. UTC 
This series adds support to calculate system memdev parameters and calculate
total system memory bandwidth. This parameters and BW will be used to enable
WM level-0 latency workaround and display memory bandwidth related WA for gen9.

while we are here to enable IPC based on memory configuration lets also 
make sure that we override IPC value set of BIOS incase we decide to
disable IPC in KMS.


Mahesh Kumar (5):
  drm/i915/bxt: Decode memory bandwidth and parameters
  drm/i915/skl+: Decode memory bandwidth and parameters
  drm/i915: Implement 16GB dimm wa for latency level-0
  drm/i915/skl+: don't trust IPC value set by BIOS
  drm/i915/kbl+: Enable IPC only for symmetric memory configurations

 drivers/gpu/drm/i915/i915_drv.c | 300 ++++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h |  23 +++
 drivers/gpu/drm/i915/i915_reg.h |  48 +++++++
 drivers/gpu/drm/i915/intel_pm.c |  22 ++-
 4 files changed, 390 insertions(+), 3 deletions(-)

Comments

Rodrigo Vivi Sept. 6, 2018, 2:08 a.m. UTC | #1 
On Fri, Aug 31, 2018 at 11:22:01AM -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: Decode memdev info and bandwidth and implemnt latency WA (rev4)
> URL   : https://patchwork.freedesktop.org/series/46481/
> State : warning
> 
> == Summary ==
> 
> $ dim checkpatch origin/drm-tip
> 441057f30f45 drm/i915/bxt: Decode memory bandwidth and parameters
> -:162: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384

I'm still asking myself how to proceed with this one here.

We clearly have many more cases of bool structure members on i915.

> #162: FILE: drivers/gpu/drm/i915/i915_drv.h:1948:
> +		bool valid;
> 
> total: 0 errors, 0 warnings, 1 checks, 182 lines checked
> bc3e164750dd drm/i915/skl+: Decode memory bandwidth and parameters
> 08094101d869 drm/i915: Implement 16GB dimm wa for latency level-0
> -:116: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
> #116: FILE: drivers/gpu/drm/i915/i915_drv.h:1949:
> +		bool valid_dimm;
> 
> -:117: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
> #117: FILE: drivers/gpu/drm/i915/i915_drv.h:1950:
> +		bool is_16gb_dimm;
> 
> -:125: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
> #125: FILE: drivers/gpu/drm/i915/i915_drv.h:2179:
> +	bool is_16gb_dimm;
> 
> total: 0 errors, 0 warnings, 3 checks, 107 lines checked
> 9968070f860e drm/i915/skl+: don't trust IPC value set by BIOS
> 268a50bd35d9 drm/i915/kbl+: Enable IPC only for symmetric memory configurations
> -:82: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
> #82: FILE: drivers/gpu/drm/i915/i915_drv.h:1958:
> +		bool symmetric_memory;
> 
> total: 0 errors, 0 warnings, 1 checks, 67 lines checked
> 
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