| Message ID | 1536161385-25562-7-git-send-email-jacopo+renesas@jmondi.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 89f1415884b981574ff9d045c3d583c16094c87c |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | arm64: dts: renesas: Ebisu: Add HDMI and CVBS input | expand |
On Wed, Sep 05, 2018 at 05:29:43PM +0200, Jacopo Mondi wrote: > From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device tree. > > Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Thanks. I took the liberty of re-arranging the node order to preserve the existing sort order in the .dtsi file. The result is as follows: From 053f0c7e8547095a959cbd3bbaf602388c8bbca7 Mon Sep 17 00:00:00 2001 From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Date: Wed, 5 Sep 2018 17:29:43 +0200 Subject: [PATCH] arm64: dts: r8a77990: Add VIN and CSI-2 device nodes Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device tree. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> [simon: sorted nodes by bus address, then IP block] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- arch/arm64/boot/dts/renesas/r8a77990.dtsi | 79 +++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index e3009c5f5210..c010358ba076 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -481,6 +481,54 @@ status = "disabled"; }; + vin4: video@e6ef4000 { + compatible = "renesas,vin-r8a77990"; + reg = <0 0xe6ef4000 0 0x1000>; + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 807>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 807>; + renesas,id = <4>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + vin4csi40: endpoint { + remote-endpoint= <&csi40vin4>; + }; + }; + }; + }; + + vin5: video@e6ef5000 { + compatible = "renesas,vin-r8a77990"; + reg = <0 0xe6ef5000 0 0x1000>; + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 806>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 806>; + renesas,id = <5>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + vin5csi40: endpoint { + remote-endpoint= <&csi40vin5>; + }; + }; + }; + }; + xhci0: usb@ee000000 { compatible = "renesas,xhci-r8a77990", "renesas,rcar-gen3-xhci"; @@ -546,6 +594,37 @@ resets = <&cpg 408>; }; + csi40: csi2@feaa0000 { + compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; + reg = <0 0xfeaa0000 0 0x10000>; + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 716>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 716>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + + reg = <1>; + + csi40vin4: endpoint@0 { + reg = <0>; + remote-endpoint = <&vin4csi40>; + }; + csi40vin5: endpoint@1 { + reg = <1>; + remote-endpoint = <&vin5csi40>; + }; + }; + }; + }; + prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>;
On Thu, Sep 06, 2018 at 11:10:33AM +0200, Simon Horman wrote: > On Wed, Sep 05, 2018 at 05:29:43PM +0200, Jacopo Mondi wrote: > > From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > > > Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device tree. > > > > Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > > Thanks. > > I took the liberty of re-arranging the node order to preserve the existing > sort order in the .dtsi file. > > The result is as follows: > > > >From 053f0c7e8547095a959cbd3bbaf602388c8bbca7 Mon Sep 17 00:00:00 2001 > From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > Date: Wed, 5 Sep 2018 17:29:43 +0200 > Subject: [PATCH] arm64: dts: r8a77990: Add VIN and CSI-2 device nodes > > Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device tree. > > Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > [simon: sorted nodes by bus address, then IP block] > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Sorry, I missread Laurent's reply to 7/7 and now see that he has not supplied tags for this patch. I have not queued up this patch after all and am waiting for review. Sorry for my confusion.
Hi Jacopo, Thank you for the patch. On Wednesday, 5 September 2018 18:29:43 EEST Jacopo Mondi wrote: > From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device tree. > > Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > --- > arch/arm64/boot/dts/renesas/r8a77990.dtsi | 79 ++++++++++++++++++++++++++++ > 1 file changed, 79 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index ae89260..0ae7bbe 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > @@ -337,6 +337,85 @@ > status = "disabled"; > }; > > + csi40: csi2@feaa0000 { I believe Simon would like to keep the nodes sorted by address > + compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; > + reg = <0 0xfeaa0000 0 0x10000>; 0x10000 seems pretty large to me. Apart from that, Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 716>; > + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > + resets = <&cpg 716>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@1 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + reg = <1>; > + > + csi40vin4: endpoint@0 { > + reg = <0>; > + remote-endpoint = <&vin4csi40>; > + }; > + csi40vin5: endpoint@1 { > + reg = <1>; > + remote-endpoint = <&vin5csi40>; > + }; > + }; > + }; > + }; > + > + vin4: video@e6ef4000 { > + compatible = "renesas,vin-r8a77990"; > + reg = <0 0xe6ef4000 0 0x1000>; > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 807>; > + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > + resets = <&cpg 807>; > + renesas,id = <4>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@1 { > + reg = <1>; > + > + vin4csi40: endpoint { > + remote-endpoint= <&csi40vin4>; > + }; > + }; > + }; > + }; > + > + vin5: video@e6ef5000 { > + compatible = "renesas,vin-r8a77990"; > + reg = <0 0xe6ef5000 0 0x1000>; > + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 806>; > + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > + resets = <&cpg 806>; > + renesas,id = <5>; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@1 { > + reg = <1>; > + > + vin5csi40: endpoint { > + remote-endpoint= <&csi40vin5>; > + }; > + }; > + }; > + }; > + > scif2: serial@e6e88000 { > compatible = "renesas,scif-r8a77990", > "renesas,rcar-gen3-scif", "renesas,scif";
Hi Jacopo, On Monday, 10 September 2018 17:12:30 EEST Laurent Pinchart wrote: > Hi Jacopo, > > Thank you for the patch. > > On Wednesday, 5 September 2018 18:29:43 EEST Jacopo Mondi wrote: > > From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > > > Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device > > tree. > > > > Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > > --- > > > > arch/arm64/boot/dts/renesas/r8a77990.dtsi | 79 ++++++++++++++++++++++++++ > > 1 file changed, 79 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index ae89260..0ae7bbe 100644 > > --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > @@ -337,6 +337,85 @@ > > > > status = "disabled"; > > > > }; > > > > + csi40: csi2@feaa0000 { > > I believe Simon would like to keep the nodes sorted by address > > > + compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; > > + reg = <0 0xfeaa0000 0 0x10000>; > > 0x10000 seems pretty large to me. > > Apart from that, > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&cpg CPG_MOD 716>; > > + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > + resets = <&cpg 716>; > > + status = "disabled"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@1 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + reg = <1>; > > + > > + csi40vin4: endpoint@0 { > > + reg = <0>; > > + remote-endpoint = <&vin4csi40>; > > + }; > > + csi40vin5: endpoint@1 { > > + reg = <1>; > > + remote-endpoint = <&vin5csi40>; > > + }; > > + }; > > + }; > > + }; > > + > > + vin4: video@e6ef4000 { > > + compatible = "renesas,vin-r8a77990"; > > + reg = <0 0xe6ef4000 0 0x1000>; > > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&cpg CPG_MOD 807>; > > + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > + resets = <&cpg 807>; > > + renesas,id = <4>; > > + status = "disabled"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@1 { > > + reg = <1>; > > + > > + vin4csi40: endpoint { > > + remote-endpoint= <&csi40vin4>; I've just realized that this endpoint has to be numbered, otherwise MC links won't be created. > > + }; > > + }; > > + }; > > + }; > > + > > + vin5: video@e6ef5000 { > > + compatible = "renesas,vin-r8a77990"; > > + reg = <0 0xe6ef5000 0 0x1000>; > > + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&cpg CPG_MOD 806>; > > + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > + resets = <&cpg 806>; > > + renesas,id = <5>; > > + status = "disabled"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@1 { > > + reg = <1>; > > + > > + vin5csi40: endpoint { > > + remote-endpoint= <&csi40vin5>; Same here. > > + }; > > + }; > > + }; > > + }; > > + > > > > scif2: serial@e6e88000 { > > > > compatible = "renesas,scif-r8a77990", > > > > "renesas,rcar-gen3-scif", "renesas,scif";
On Mon, Sep 10, 2018 at 05:12:30PM +0300, Laurent Pinchart wrote: > Hi Jacopo, > > Thank you for the patch. > > On Wednesday, 5 September 2018 18:29:43 EEST Jacopo Mondi wrote: > > From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > > > Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device tree. > > > > Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > > --- > > arch/arm64/boot/dts/renesas/r8a77990.dtsi | 79 ++++++++++++++++++++++++++++ > > 1 file changed, 79 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index ae89260..0ae7bbe 100644 > > --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > @@ -337,6 +337,85 @@ > > status = "disabled"; > > }; > > > > + csi40: csi2@feaa0000 { > > I believe Simon would like to keep the nodes sorted by address > > > + compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; > > + reg = <0 0xfeaa0000 0 0x10000>; > > 0x10000 seems pretty large to me. It seems to me that all Gen3 SoC have this lenght specified $git grep -A 10 'csi[2|4][0|1]: csi' arch/arm64/boot/dts/renesas/ | grep reg arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfea80000 0 0x10000>; arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeaa0000 0 0x10000>; arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeab0000 0 0x10000>; arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfea80000 0 0x10000>; arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfeaa0000 0 0x10000>; arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfea80000 0 0x10000>; arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfeaa0000 0 0x10000>; arch/arm64/boot/dts/renesas/r8a77970.dtsi- reg = <0 0xfeaa0000 0 0x10000>; arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeaa0000 0 0x10000>; arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeab0000 0 0x10000>; arch/arm64/boot/dts/renesas/r8a77990.dtsi- reg = <0 0xfeaa0000 0 0x10000>; Am I missing something? > > Apart from that, I will include the upporting of the following patch to fix the VIN endpoint numbering in forthcoming v3: https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit/?id=1b1b73f7558d867d72e198901b84bec1e6ef1405 As this has already been applied to simon's tree. Thanks j > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&cpg CPG_MOD 716>; > > + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > + resets = <&cpg 716>; > > + status = "disabled"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@1 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + reg = <1>; > > + > > + csi40vin4: endpoint@0 { > > + reg = <0>; > > + remote-endpoint = <&vin4csi40>; > > + }; > > + csi40vin5: endpoint@1 { > > + reg = <1>; > > + remote-endpoint = <&vin5csi40>; > > + }; > > + }; > > + }; > > + }; > > + > > + vin4: video@e6ef4000 { > > + compatible = "renesas,vin-r8a77990"; > > + reg = <0 0xe6ef4000 0 0x1000>; > > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&cpg CPG_MOD 807>; > > + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > + resets = <&cpg 807>; > > + renesas,id = <4>; > > + status = "disabled"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@1 { > > + reg = <1>; > > + > > + vin4csi40: endpoint { > > + remote-endpoint= <&csi40vin4>; > > + }; > > + }; > > + }; > > + }; > > + > > + vin5: video@e6ef5000 { > > + compatible = "renesas,vin-r8a77990"; > > + reg = <0 0xe6ef5000 0 0x1000>; > > + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&cpg CPG_MOD 806>; > > + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > + resets = <&cpg 806>; > > + renesas,id = <5>; > > + status = "disabled"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@1 { > > + reg = <1>; > > + > > + vin5csi40: endpoint { > > + remote-endpoint= <&csi40vin5>; > > + }; > > + }; > > + }; > > + }; > > + > > scif2: serial@e6e88000 { > > compatible = "renesas,scif-r8a77990", > > "renesas,rcar-gen3-scif", "renesas,scif"; > > > -- > Regards, > > Laurent Pinchart > > >
Hi Jacopo, On Tuesday, 30 October 2018 12:14:31 EET jacopo mondi wrote: > On Mon, Sep 10, 2018 at 05:12:30PM +0300, Laurent Pinchart wrote: > > On Wednesday, 5 September 2018 18:29:43 EEST Jacopo Mondi wrote: > >> From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > >> > >> Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device > >> tree. > >> > >> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > >> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > >> --- > >> > >> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 79 ++++++++++++++++++++++++ > >> 1 file changed, 79 insertions(+) > >> > >> diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > >> b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index ae89260..0ae7bbe > >> 100644 > >> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > >> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > >> @@ -337,6 +337,85 @@ > >> > >> status = "disabled"; > >> > >> }; > >> > >> + csi40: csi2@feaa0000 { > > > > I believe Simon would like to keep the nodes sorted by address > > > >> + compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; > >> + reg = <0 0xfeaa0000 0 0x10000>; > > > > 0x10000 seems pretty large to me. > > It seems to me that all Gen3 SoC have this lenght specified > > $git grep -A 10 'csi[2|4][0|1]: csi' arch/arm64/boot/dts/renesas/ | grep reg > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfea80000 0 0x10000>; > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeab0000 0 0x10000>; > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfea80000 0 0x10000>; > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfea80000 0 0x10000>; > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > arch/arm64/boot/dts/renesas/r8a77970.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeab0000 0 0x10000>; > arch/arm64/boot/dts/renesas/r8a77990.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > Am I missing something? Cargo-cult programming ? :-) This will likely not hurt, but such a large memory area is not required, and we'll save a bit of memory if we reduce the mapping from 64kB to 4kB (or less) > > Apart from that, > > I will include the upporting of the following patch to fix the VIN > endpoint numbering in forthcoming v3: > https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit > /?id=1b1b73f7558d867d72e198901b84bec1e6ef1405 > > As this has already been applied to simon's tree. > > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > >> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; > >> + clocks = <&cpg CPG_MOD 716>; > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > >> + resets = <&cpg 716>; > >> + status = "disabled"; > >> + > >> + ports { > >> + #address-cells = <1>; > >> + #size-cells = <0>; > >> + > >> + port@1 { > >> + #address-cells = <1>; > >> + #size-cells = <0>; > >> + > >> + reg = <1>; > >> + > >> + csi40vin4: endpoint@0 { > >> + reg = <0>; > >> + remote-endpoint = <&vin4csi40>; > >> + }; > >> + csi40vin5: endpoint@1 { > >> + reg = <1>; > >> + remote-endpoint = <&vin5csi40>; > >> + }; > >> + }; > >> + }; > >> + }; > >> + > >> + vin4: video@e6ef4000 { > >> + compatible = "renesas,vin-r8a77990"; > >> + reg = <0 0xe6ef4000 0 0x1000>; > >> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > >> + clocks = <&cpg CPG_MOD 807>; > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > >> + resets = <&cpg 807>; > >> + renesas,id = <4>; > >> + status = "disabled"; > >> + > >> + ports { > >> + #address-cells = <1>; > >> + #size-cells = <0>; > >> + > >> + port@1 { > >> + reg = <1>; > >> + > >> + vin4csi40: endpoint { > >> + remote-endpoint= <&csi40vin4>; > >> + }; > >> + }; > >> + }; > >> + }; > >> + > >> + vin5: video@e6ef5000 { > >> + compatible = "renesas,vin-r8a77990"; > >> + reg = <0 0xe6ef5000 0 0x1000>; > >> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; > >> + clocks = <&cpg CPG_MOD 806>; > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > >> + resets = <&cpg 806>; > >> + renesas,id = <5>; > >> + status = "disabled"; > >> + > >> + ports { > >> + #address-cells = <1>; > >> + #size-cells = <0>; > >> + > >> + port@1 { > >> + reg = <1>; > >> + > >> + vin5csi40: endpoint { > >> + remote-endpoint= <&csi40vin5>; > >> + }; > >> + }; > >> + }; > >> + }; > >> + > >> scif2: serial@e6e88000 { > >> compatible = "renesas,scif-r8a77990", > >> "renesas,rcar-gen3-scif", "renesas,scif";
On Tue, Oct 30, 2018 at 02:57:59PM +0200, Laurent Pinchart wrote: > Hi Jacopo, > > On Tuesday, 30 October 2018 12:14:31 EET jacopo mondi wrote: > > On Mon, Sep 10, 2018 at 05:12:30PM +0300, Laurent Pinchart wrote: > > > On Wednesday, 5 September 2018 18:29:43 EEST Jacopo Mondi wrote: > > >> From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > >> > > >> Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device > > >> tree. > > >> > > >> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > >> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > > >> --- > > >> > > >> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 79 ++++++++++++++++++++++++ > > >> 1 file changed, 79 insertions(+) > > >> > > >> diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > >> b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index ae89260..0ae7bbe > > >> 100644 > > >> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > >> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > >> @@ -337,6 +337,85 @@ > > >> > > >> status = "disabled"; > > >> > > >> }; > > >> > > >> + csi40: csi2@feaa0000 { > > > > > > I believe Simon would like to keep the nodes sorted by address > > > > > >> + compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; > > >> + reg = <0 0xfeaa0000 0 0x10000>; > > > > > > 0x10000 seems pretty large to me. > > > > It seems to me that all Gen3 SoC have this lenght specified > > > > $git grep -A 10 'csi[2|4][0|1]: csi' arch/arm64/boot/dts/renesas/ | grep reg > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfea80000 0 0x10000>; > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeab0000 0 0x10000>; > > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfea80000 0 0x10000>; > > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfea80000 0 0x10000>; > > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > arch/arm64/boot/dts/renesas/r8a77970.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeab0000 0 0x10000>; > > arch/arm64/boot/dts/renesas/r8a77990.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > Am I missing something? > > Cargo-cult programming ? :-) This will likely not hurt, but such a large > memory area is not required, and we'll save a bit of memory if we reduce the > mapping from 64kB to 4kB (or less) Can we please update this patch, and existing dtsi files, to use an appropriately small register window? > > > > Apart from that, > > > > I will include the upporting of the following patch to fix the VIN > > endpoint numbering in forthcoming v3: > > https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit > > /?id=1b1b73f7558d867d72e198901b84bec1e6ef1405 > > > > As this has already been applied to simon's tree. > > > > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > > > >> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; > > >> + clocks = <&cpg CPG_MOD 716>; > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > >> + resets = <&cpg 716>; > > >> + status = "disabled"; > > >> + > > >> + ports { > > >> + #address-cells = <1>; > > >> + #size-cells = <0>; > > >> + > > >> + port@1 { > > >> + #address-cells = <1>; > > >> + #size-cells = <0>; > > >> + > > >> + reg = <1>; > > >> + > > >> + csi40vin4: endpoint@0 { > > >> + reg = <0>; > > >> + remote-endpoint = <&vin4csi40>; > > >> + }; > > >> + csi40vin5: endpoint@1 { > > >> + reg = <1>; > > >> + remote-endpoint = <&vin5csi40>; > > >> + }; > > >> + }; > > >> + }; > > >> + }; > > >> + > > >> + vin4: video@e6ef4000 { > > >> + compatible = "renesas,vin-r8a77990"; > > >> + reg = <0 0xe6ef4000 0 0x1000>; > > >> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > > >> + clocks = <&cpg CPG_MOD 807>; > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > >> + resets = <&cpg 807>; > > >> + renesas,id = <4>; > > >> + status = "disabled"; > > >> + > > >> + ports { > > >> + #address-cells = <1>; > > >> + #size-cells = <0>; > > >> + > > >> + port@1 { > > >> + reg = <1>; > > >> + > > >> + vin4csi40: endpoint { > > >> + remote-endpoint= <&csi40vin4>; > > >> + }; > > >> + }; > > >> + }; > > >> + }; > > >> + > > >> + vin5: video@e6ef5000 { > > >> + compatible = "renesas,vin-r8a77990"; > > >> + reg = <0 0xe6ef5000 0 0x1000>; > > >> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; > > >> + clocks = <&cpg CPG_MOD 806>; > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > >> + resets = <&cpg 806>; > > >> + renesas,id = <5>; > > >> + status = "disabled"; > > >> + > > >> + ports { > > >> + #address-cells = <1>; > > >> + #size-cells = <0>; > > >> + > > >> + port@1 { > > >> + reg = <1>; > > >> + > > >> + vin5csi40: endpoint { > > >> + remote-endpoint= <&csi40vin5>; > > >> + }; > > >> + }; > > >> + }; > > >> + }; > > >> + > > >> scif2: serial@e6e88000 { > > >> compatible = "renesas,scif-r8a77990", > > >> "renesas,rcar-gen3-scif", "renesas,scif"; > > -- > Regards, > > Laurent Pinchart > > >
Hi Simon, On Wed, Oct 31, 2018 at 01:48:13PM +0100, Simon Horman wrote: > On Tue, Oct 30, 2018 at 02:57:59PM +0200, Laurent Pinchart wrote: > > Hi Jacopo, > > > > On Tuesday, 30 October 2018 12:14:31 EET jacopo mondi wrote: > > > On Mon, Sep 10, 2018 at 05:12:30PM +0300, Laurent Pinchart wrote: > > > > On Wednesday, 5 September 2018 18:29:43 EEST Jacopo Mondi wrote: > > > >> From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > > >> > > > >> Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device > > > >> tree. > > > >> > > > >> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > > >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > >> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > > > >> --- > > > >> > > > >> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 79 ++++++++++++++++++++++++ > > > >> 1 file changed, 79 insertions(+) > > > >> > > > >> diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > >> b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index ae89260..0ae7bbe > > > >> 100644 > > > >> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > >> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > >> @@ -337,6 +337,85 @@ > > > >> > > > >> status = "disabled"; > > > >> > > > >> }; > > > >> > > > >> + csi40: csi2@feaa0000 { > > > > > > > > I believe Simon would like to keep the nodes sorted by address > > > > > > > >> + compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; > > > >> + reg = <0 0xfeaa0000 0 0x10000>; > > > > > > > > 0x10000 seems pretty large to me. > > > > > > It seems to me that all Gen3 SoC have this lenght specified > > > > > > $git grep -A 10 'csi[2|4][0|1]: csi' arch/arm64/boot/dts/renesas/ | grep reg > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeab0000 0 0x10000>; > > > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > arch/arm64/boot/dts/renesas/r8a77970.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeab0000 0 0x10000>; > > > arch/arm64/boot/dts/renesas/r8a77990.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > > Am I missing something? > > > > Cargo-cult programming ? :-) This will likely not hurt, but such a large > > memory area is not required, and we'll save a bit of memory if we reduce the > > mapping from 64kB to 4kB (or less) > > Can we please update this patch, and existing dtsi files, > to use an appropriately small register window? > What if we keep this one as it is and we change all the DTSIs in one go? > > > > > > Apart from that, > > > > > > I will include the upporting of the following patch to fix the VIN > > > endpoint numbering in forthcoming v3: > > > https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit > > > /?id=1b1b73f7558d867d72e198901b84bec1e6ef1405 > > > > > > As this has already been applied to simon's tree. > > > > > > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > > > > > >> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; > > > >> + clocks = <&cpg CPG_MOD 716>; > > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > > >> + resets = <&cpg 716>; > > > >> + status = "disabled"; > > > >> + > > > >> + ports { > > > >> + #address-cells = <1>; > > > >> + #size-cells = <0>; > > > >> + > > > >> + port@1 { > > > >> + #address-cells = <1>; > > > >> + #size-cells = <0>; > > > >> + > > > >> + reg = <1>; > > > >> + > > > >> + csi40vin4: endpoint@0 { > > > >> + reg = <0>; > > > >> + remote-endpoint = <&vin4csi40>; > > > >> + }; > > > >> + csi40vin5: endpoint@1 { > > > >> + reg = <1>; > > > >> + remote-endpoint = <&vin5csi40>; > > > >> + }; > > > >> + }; > > > >> + }; > > > >> + }; > > > >> + > > > >> + vin4: video@e6ef4000 { > > > >> + compatible = "renesas,vin-r8a77990"; > > > >> + reg = <0 0xe6ef4000 0 0x1000>; > > > >> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > > > >> + clocks = <&cpg CPG_MOD 807>; > > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > > >> + resets = <&cpg 807>; > > > >> + renesas,id = <4>; > > > >> + status = "disabled"; > > > >> + > > > >> + ports { > > > >> + #address-cells = <1>; > > > >> + #size-cells = <0>; > > > >> + > > > >> + port@1 { > > > >> + reg = <1>; > > > >> + > > > >> + vin4csi40: endpoint { > > > >> + remote-endpoint= <&csi40vin4>; > > > >> + }; > > > >> + }; > > > >> + }; > > > >> + }; > > > >> + > > > >> + vin5: video@e6ef5000 { > > > >> + compatible = "renesas,vin-r8a77990"; > > > >> + reg = <0 0xe6ef5000 0 0x1000>; > > > >> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; > > > >> + clocks = <&cpg CPG_MOD 806>; > > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > > >> + resets = <&cpg 806>; > > > >> + renesas,id = <5>; > > > >> + status = "disabled"; > > > >> + > > > >> + ports { > > > >> + #address-cells = <1>; > > > >> + #size-cells = <0>; > > > >> + > > > >> + port@1 { > > > >> + reg = <1>; > > > >> + > > > >> + vin5csi40: endpoint { > > > >> + remote-endpoint= <&csi40vin5>; > > > >> + }; > > > >> + }; > > > >> + }; > > > >> + }; > > > >> + > > > >> scif2: serial@e6e88000 { > > > >> compatible = "renesas,scif-r8a77990", > > > >> "renesas,rcar-gen3-scif", "renesas,scif"; > > > > -- > > Regards, > > > > Laurent Pinchart > > > > > >
On Wed, Oct 31, 2018 at 02:18:40PM +0100, jacopo mondi wrote: > Hi Simon, > > On Wed, Oct 31, 2018 at 01:48:13PM +0100, Simon Horman wrote: > > On Tue, Oct 30, 2018 at 02:57:59PM +0200, Laurent Pinchart wrote: > > > Hi Jacopo, > > > > > > On Tuesday, 30 October 2018 12:14:31 EET jacopo mondi wrote: > > > > On Mon, Sep 10, 2018 at 05:12:30PM +0300, Laurent Pinchart wrote: > > > > > On Wednesday, 5 September 2018 18:29:43 EEST Jacopo Mondi wrote: > > > > >> From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > > > >> > > > > >> Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device > > > > >> tree. > > > > >> > > > > >> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > > > >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > > >> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > > > > >> --- > > > > >> > > > > >> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 79 ++++++++++++++++++++++++ > > > > >> 1 file changed, 79 insertions(+) > > > > >> > > > > >> diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > > >> b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index ae89260..0ae7bbe > > > > >> 100644 > > > > >> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > > >> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > > >> @@ -337,6 +337,85 @@ > > > > >> > > > > >> status = "disabled"; > > > > >> > > > > >> }; > > > > >> > > > > >> + csi40: csi2@feaa0000 { > > > > > > > > > > I believe Simon would like to keep the nodes sorted by address > > > > > > > > > >> + compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; > > > > >> + reg = <0 0xfeaa0000 0 0x10000>; > > > > > > > > > > 0x10000 seems pretty large to me. > > > > > > > > It seems to me that all Gen3 SoC have this lenght specified > > > > > > > > $git grep -A 10 'csi[2|4][0|1]: csi' arch/arm64/boot/dts/renesas/ | grep reg > > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeab0000 0 0x10000>; > > > > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > arch/arm64/boot/dts/renesas/r8a77970.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeab0000 0 0x10000>; > > > > arch/arm64/boot/dts/renesas/r8a77990.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > > > > Am I missing something? > > > > > > Cargo-cult programming ? :-) This will likely not hurt, but such a large > > > memory area is not required, and we'll save a bit of memory if we reduce the > > > mapping from 64kB to 4kB (or less) > > > > Can we please update this patch, and existing dtsi files, > > to use an appropriately small register window? > > > > What if we keep this one as it is and we change all the DTSIs in one > go? I would rather we correct this patch than add it with a known problem. > > > > > > > > > Apart from that, > > > > > > > > I will include the upporting of the following patch to fix the VIN > > > > endpoint numbering in forthcoming v3: > > > > https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit > > > > /?id=1b1b73f7558d867d72e198901b84bec1e6ef1405 > > > > > > > > As this has already been applied to simon's tree. > > > > > > > > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > > > > > > > >> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; > > > > >> + clocks = <&cpg CPG_MOD 716>; > > > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > > > >> + resets = <&cpg 716>; > > > > >> + status = "disabled"; > > > > >> + > > > > >> + ports { > > > > >> + #address-cells = <1>; > > > > >> + #size-cells = <0>; > > > > >> + > > > > >> + port@1 { > > > > >> + #address-cells = <1>; > > > > >> + #size-cells = <0>; > > > > >> + > > > > >> + reg = <1>; > > > > >> + > > > > >> + csi40vin4: endpoint@0 { > > > > >> + reg = <0>; > > > > >> + remote-endpoint = <&vin4csi40>; > > > > >> + }; > > > > >> + csi40vin5: endpoint@1 { > > > > >> + reg = <1>; > > > > >> + remote-endpoint = <&vin5csi40>; > > > > >> + }; > > > > >> + }; > > > > >> + }; > > > > >> + }; > > > > >> + > > > > >> + vin4: video@e6ef4000 { > > > > >> + compatible = "renesas,vin-r8a77990"; > > > > >> + reg = <0 0xe6ef4000 0 0x1000>; > > > > >> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > > > > >> + clocks = <&cpg CPG_MOD 807>; > > > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > > > >> + resets = <&cpg 807>; > > > > >> + renesas,id = <4>; > > > > >> + status = "disabled"; > > > > >> + > > > > >> + ports { > > > > >> + #address-cells = <1>; > > > > >> + #size-cells = <0>; > > > > >> + > > > > >> + port@1 { > > > > >> + reg = <1>; > > > > >> + > > > > >> + vin4csi40: endpoint { > > > > >> + remote-endpoint= <&csi40vin4>; > > > > >> + }; > > > > >> + }; > > > > >> + }; > > > > >> + }; > > > > >> + > > > > >> + vin5: video@e6ef5000 { > > > > >> + compatible = "renesas,vin-r8a77990"; > > > > >> + reg = <0 0xe6ef5000 0 0x1000>; > > > > >> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; > > > > >> + clocks = <&cpg CPG_MOD 806>; > > > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > > > >> + resets = <&cpg 806>; > > > > >> + renesas,id = <5>; > > > > >> + status = "disabled"; > > > > >> + > > > > >> + ports { > > > > >> + #address-cells = <1>; > > > > >> + #size-cells = <0>; > > > > >> + > > > > >> + port@1 { > > > > >> + reg = <1>; > > > > >> + > > > > >> + vin5csi40: endpoint { > > > > >> + remote-endpoint= <&csi40vin5>; > > > > >> + }; > > > > >> + }; > > > > >> + }; > > > > >> + }; > > > > >> + > > > > >> scif2: serial@e6e88000 { > > > > >> compatible = "renesas,scif-r8a77990", > > > > >> "renesas,rcar-gen3-scif", "renesas,scif"; > > > > > > -- > > > Regards, > > > > > > Laurent Pinchart > > > > > > > > >
Hi Simon, On Wed, Oct 31, 2018 at 03:37:39PM +0100, Simon Horman wrote: > On Wed, Oct 31, 2018 at 02:18:40PM +0100, jacopo mondi wrote: > > Hi Simon, > > > > On Wed, Oct 31, 2018 at 01:48:13PM +0100, Simon Horman wrote: > > > On Tue, Oct 30, 2018 at 02:57:59PM +0200, Laurent Pinchart wrote: > > > > Hi Jacopo, > > > > > > > > On Tuesday, 30 October 2018 12:14:31 EET jacopo mondi wrote: > > > > > On Mon, Sep 10, 2018 at 05:12:30PM +0300, Laurent Pinchart wrote: > > > > > > On Wednesday, 5 September 2018 18:29:43 EEST Jacopo Mondi wrote: > > > > > >> From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > > > > >> > > > > > >> Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device > > > > > >> tree. > > > > > >> > > > > > >> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > > > > >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > > > >> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > > > > > >> --- > > > > > >> > > > > > >> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 79 ++++++++++++++++++++++++ > > > > > >> 1 file changed, 79 insertions(+) > > > > > >> > > > > > >> diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > > > >> b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index ae89260..0ae7bbe > > > > > >> 100644 > > > > > >> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > > > >> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > > > >> @@ -337,6 +337,85 @@ > > > > > >> > > > > > >> status = "disabled"; > > > > > >> > > > > > >> }; > > > > > >> > > > > > >> + csi40: csi2@feaa0000 { > > > > > > > > > > > > I believe Simon would like to keep the nodes sorted by address > > > > > > > > > > > >> + compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; > > > > > >> + reg = <0 0xfeaa0000 0 0x10000>; > > > > > > > > > > > > 0x10000 seems pretty large to me. > > > > > > > > > > It seems to me that all Gen3 SoC have this lenght specified > > > > > > > > > > $git grep -A 10 'csi[2|4][0|1]: csi' arch/arm64/boot/dts/renesas/ | grep reg > > > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeab0000 0 0x10000>; > > > > > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > > > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > > > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > arch/arm64/boot/dts/renesas/r8a77970.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeab0000 0 0x10000>; > > > > > arch/arm64/boot/dts/renesas/r8a77990.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > > > > > > Am I missing something? > > > > > > > > Cargo-cult programming ? :-) This will likely not hurt, but such a large > > > > memory area is not required, and we'll save a bit of memory if we reduce the > > > > mapping from 64kB to 4kB (or less) > > > > > > Can we please update this patch, and existing dtsi files, > > > to use an appropriately small register window? > > > > > > > What if we keep this one as it is and we change all the DTSIs in one > > go? > > I would rather we correct this patch than add it with a known problem. Sorry, I was confused. This patch is already in v4.20. If we want to fix this, a single follow-up patch that changes the memory area size for all SoCs is required. Thanks j > > > > > > > > > > > > > Apart from that, > > > > > > > > > > I will include the upporting of the following patch to fix the VIN > > > > > endpoint numbering in forthcoming v3: > > > > > https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git/commit > > > > > /?id=1b1b73f7558d867d72e198901b84bec1e6ef1405 > > > > > > > > > > As this has already been applied to simon's tree. > > > > > > > > > > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > > > > > > > > > > >> + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; > > > > > >> + clocks = <&cpg CPG_MOD 716>; > > > > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > > > > >> + resets = <&cpg 716>; > > > > > >> + status = "disabled"; > > > > > >> + > > > > > >> + ports { > > > > > >> + #address-cells = <1>; > > > > > >> + #size-cells = <0>; > > > > > >> + > > > > > >> + port@1 { > > > > > >> + #address-cells = <1>; > > > > > >> + #size-cells = <0>; > > > > > >> + > > > > > >> + reg = <1>; > > > > > >> + > > > > > >> + csi40vin4: endpoint@0 { > > > > > >> + reg = <0>; > > > > > >> + remote-endpoint = <&vin4csi40>; > > > > > >> + }; > > > > > >> + csi40vin5: endpoint@1 { > > > > > >> + reg = <1>; > > > > > >> + remote-endpoint = <&vin5csi40>; > > > > > >> + }; > > > > > >> + }; > > > > > >> + }; > > > > > >> + }; > > > > > >> + > > > > > >> + vin4: video@e6ef4000 { > > > > > >> + compatible = "renesas,vin-r8a77990"; > > > > > >> + reg = <0 0xe6ef4000 0 0x1000>; > > > > > >> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; > > > > > >> + clocks = <&cpg CPG_MOD 807>; > > > > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > > > > >> + resets = <&cpg 807>; > > > > > >> + renesas,id = <4>; > > > > > >> + status = "disabled"; > > > > > >> + > > > > > >> + ports { > > > > > >> + #address-cells = <1>; > > > > > >> + #size-cells = <0>; > > > > > >> + > > > > > >> + port@1 { > > > > > >> + reg = <1>; > > > > > >> + > > > > > >> + vin4csi40: endpoint { > > > > > >> + remote-endpoint= <&csi40vin4>; > > > > > >> + }; > > > > > >> + }; > > > > > >> + }; > > > > > >> + }; > > > > > >> + > > > > > >> + vin5: video@e6ef5000 { > > > > > >> + compatible = "renesas,vin-r8a77990"; > > > > > >> + reg = <0 0xe6ef5000 0 0x1000>; > > > > > >> + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; > > > > > >> + clocks = <&cpg CPG_MOD 806>; > > > > > >> + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; > > > > > >> + resets = <&cpg 806>; > > > > > >> + renesas,id = <5>; > > > > > >> + status = "disabled"; > > > > > >> + > > > > > >> + ports { > > > > > >> + #address-cells = <1>; > > > > > >> + #size-cells = <0>; > > > > > >> + > > > > > >> + port@1 { > > > > > >> + reg = <1>; > > > > > >> + > > > > > >> + vin5csi40: endpoint { > > > > > >> + remote-endpoint= <&csi40vin5>; > > > > > >> + }; > > > > > >> + }; > > > > > >> + }; > > > > > >> + }; > > > > > >> + > > > > > >> scif2: serial@e6e88000 { > > > > > >> compatible = "renesas,scif-r8a77990", > > > > > >> "renesas,rcar-gen3-scif", "renesas,scif"; > > > > > > > > -- > > > > Regards, > > > > > > > > Laurent Pinchart > > > > > > > > > > > > > >
On Mon, Nov 05, 2018 at 11:32:37AM +0100, jacopo mondi wrote: > Hi Simon, > > On Wed, Oct 31, 2018 at 03:37:39PM +0100, Simon Horman wrote: > > On Wed, Oct 31, 2018 at 02:18:40PM +0100, jacopo mondi wrote: > > > Hi Simon, > > > > > > On Wed, Oct 31, 2018 at 01:48:13PM +0100, Simon Horman wrote: > > > > On Tue, Oct 30, 2018 at 02:57:59PM +0200, Laurent Pinchart wrote: > > > > > Hi Jacopo, > > > > > > > > > > On Tuesday, 30 October 2018 12:14:31 EET jacopo mondi wrote: > > > > > > On Mon, Sep 10, 2018 at 05:12:30PM +0300, Laurent Pinchart wrote: > > > > > > > On Wednesday, 5 September 2018 18:29:43 EEST Jacopo Mondi wrote: > > > > > > >> From: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > > > > > >> > > > > > > >> Add device nodes for VIN4, VIN5 and CSI40 to R-Car E3 R8A77990 device > > > > > > >> tree. > > > > > > >> > > > > > > >> Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> > > > > > > >> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > > > > >> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> > > > > > > >> --- > > > > > > >> > > > > > > >> arch/arm64/boot/dts/renesas/r8a77990.dtsi | 79 ++++++++++++++++++++++++ > > > > > > >> 1 file changed, 79 insertions(+) > > > > > > >> > > > > > > >> diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > > > > >> b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index ae89260..0ae7bbe > > > > > > >> 100644 > > > > > > >> --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > > > > >> +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > > > > > > >> @@ -337,6 +337,85 @@ > > > > > > >> > > > > > > >> status = "disabled"; > > > > > > >> > > > > > > >> }; > > > > > > >> > > > > > > >> + csi40: csi2@feaa0000 { > > > > > > > > > > > > > > I believe Simon would like to keep the nodes sorted by address > > > > > > > > > > > > > >> + compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; > > > > > > >> + reg = <0 0xfeaa0000 0 0x10000>; > > > > > > > > > > > > > > 0x10000 seems pretty large to me. > > > > > > > > > > > > It seems to me that all Gen3 SoC have this lenght specified > > > > > > > > > > > > $git grep -A 10 'csi[2|4][0|1]: csi' arch/arm64/boot/dts/renesas/ | grep reg > > > > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > > arch/arm64/boot/dts/renesas/r8a7795.dtsi- reg = <0 0xfeab0000 0 0x10000>; > > > > > > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > > > > arch/arm64/boot/dts/renesas/r8a7796.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfea80000 0 0x10000>; > > > > > > arch/arm64/boot/dts/renesas/r8a77965.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > > arch/arm64/boot/dts/renesas/r8a77970.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > > arch/arm64/boot/dts/renesas/r8a77980.dtsi- reg = <0 0xfeab0000 0 0x10000>; > > > > > > arch/arm64/boot/dts/renesas/r8a77990.dtsi- reg = <0 0xfeaa0000 0 0x10000>; > > > > > > > > > > > > Am I missing something? > > > > > > > > > > Cargo-cult programming ? :-) This will likely not hurt, but such a large > > > > > memory area is not required, and we'll save a bit of memory if we reduce the > > > > > mapping from 64kB to 4kB (or less) > > > > > > > > Can we please update this patch, and existing dtsi files, > > > > to use an appropriately small register window? > > > > > > > > > > What if we keep this one as it is and we change all the DTSIs in one > > > go? > > > > I would rather we correct this patch than add it with a known problem. > > Sorry, I was confused. This patch is already in v4.20. > > If we want to fix this, a single follow-up patch that changes the > memory area size for all SoCs is required. Thanks, I was also confused. Your proposal sounds good to me.
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index ae89260..0ae7bbe 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -337,6 +337,85 @@ status = "disabled"; }; + csi40: csi2@feaa0000 { + compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; + reg = <0 0xfeaa0000 0 0x10000>; + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 716>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 716>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + + reg = <1>; + + csi40vin4: endpoint@0 { + reg = <0>; + remote-endpoint = <&vin4csi40>; + }; + csi40vin5: endpoint@1 { + reg = <1>; + remote-endpoint = <&vin5csi40>; + }; + }; + }; + }; + + vin4: video@e6ef4000 { + compatible = "renesas,vin-r8a77990"; + reg = <0 0xe6ef4000 0 0x1000>; + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 807>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 807>; + renesas,id = <4>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + vin4csi40: endpoint { + remote-endpoint= <&csi40vin4>; + }; + }; + }; + }; + + vin5: video@e6ef5000 { + compatible = "renesas,vin-r8a77990"; + reg = <0 0xe6ef5000 0 0x1000>; + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 806>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 806>; + renesas,id = <5>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + vin5csi40: endpoint { + remote-endpoint= <&csi40vin5>; + }; + }; + }; + }; + scif2: serial@e6e88000 { compatible = "renesas,scif-r8a77990", "renesas,rcar-gen3-scif", "renesas,scif";