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[3/4] drm/i915: Do not modifiy reserved bit in gens that do not have IPC

Message ID 20180913212251.22283-3-jose.souza@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/4] drm/i915/runtime_pm: Share code to enable/disable PCH reset handshake | expand

Commit Message

Souza, Jose Sept. 13, 2018, 9:22 p.m. UTC 
IPC was only added in SKL+(actually we don't even enable for SKL due
WA) so without this change, driver was writing to a reserved bit.

Also check for the WA in intel_init_ipc() to avoid further writes to
ipc_enabled.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Rodrigo Vivi Sept. 13, 2018, 9:46 p.m. UTC | #1 
On Thu, Sep 13, 2018 at 02:22:50PM -0700, José Roberto de Souza wrote:
> IPC was only added in SKL+(actually we don't even enable for SKL due
> WA) so without this change, driver was writing to a reserved bit.
> 
> Also check for the WA in intel_init_ipc() to avoid further writes to
> ipc_enabled.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d99e5fabe93c..b2328f7d277d 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6108,10 +6108,8 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
>  	u32 val;
>  
>  	/* Display WA #0477 WaDisableIPC: skl */
> -	if (IS_SKYLAKE(dev_priv)) {
> -		dev_priv->ipc_enabled = false;
> +	if (!HAS_IPC(dev_priv) || IS_SKYLAKE(dev_priv))
>  		return;
> -	}
>  
>  	val = I915_READ(DISP_ARB_CTL2);
>  
> @@ -6126,7 +6124,9 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
>  void intel_init_ipc(struct drm_i915_private *dev_priv)
>  {
>  	dev_priv->ipc_enabled = false;
> -	if (!HAS_IPC(dev_priv))
> +
> +	/* Display WA #0477 WaDisableIPC: skl */

What about move the WA 0477 inside HAS_IPC and avoid the
duplication?

> +	if (!HAS_IPC(dev_priv) || IS_SKYLAKE(dev_priv))
>  		return;
>  
>  	dev_priv->ipc_enabled = true;
> -- 
> 2.19.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d99e5fabe93c..b2328f7d277d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6108,10 +6108,8 @@  void intel_enable_ipc(struct drm_i915_private *dev_priv)
 	u32 val;
 
 	/* Display WA #0477 WaDisableIPC: skl */
-	if (IS_SKYLAKE(dev_priv)) {
-		dev_priv->ipc_enabled = false;
+	if (!HAS_IPC(dev_priv) || IS_SKYLAKE(dev_priv))
 		return;
-	}
 
 	val = I915_READ(DISP_ARB_CTL2);
 
@@ -6126,7 +6124,9 @@  void intel_enable_ipc(struct drm_i915_private *dev_priv)
 void intel_init_ipc(struct drm_i915_private *dev_priv)
 {
 	dev_priv->ipc_enabled = false;
-	if (!HAS_IPC(dev_priv))
+
+	/* Display WA #0477 WaDisableIPC: skl */
+	if (!HAS_IPC(dev_priv) || IS_SKYLAKE(dev_priv))
 		return;
 
 	dev_priv->ipc_enabled = true;