diff mbox series

drm/i915: Add new AML_ULX support list

Message ID 1537865251-19717-1-git-send-email-shawn.c.lee@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Add new AML_ULX support list | expand

Commit Message

Lee, Shawn C Sept. 25, 2018, 8:47 a.m. UTC
According to patch "drm/i915/aml: Introducing Amber Lake platform"
(e364672477a1). Add a new marco for AML ULX GT2 devices.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jose Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 2 ++
 1 file changed, 2 insertions(+)

Comments

Souza, Jose Sept. 25, 2018, 9:18 p.m. UTC | #1
On Tue, 2018-09-25 at 01:47 -0700, Lee, Shawn C wrote:
> According to patch "drm/i915/aml: Introducing Amber Lake platform"
> (e364672477a1). Add a new marco for AML ULX GT2 devices.

Just to confirm, there is a newly added Amber lake id(
https://patchwork.freedesktop.org/series/50037/) 0x87CA that is based
in WHL/CFL, I guess this one will don't need to be added to
IS_AML_ULX() too.
If you agree with that:

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Jose Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 808204a7ca7c..0c3de2d14db0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2461,6 +2461,8 @@ intel_info(const struct drm_i915_private
> *dev_priv)
>  #define IS_KBL_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x590E || \
>  				 INTEL_DEVID(dev_priv) == 0x5915 || \
>  				 INTEL_DEVID(dev_priv) == 0x591E)
> +#define IS_AML_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x591C || \
> +				 INTEL_DEVID(dev_priv) == 0x87C0)
>  #define IS_SKL_GT2(dev_priv)	(IS_SKYLAKE(dev_priv) && \
>  				 (dev_priv)->info.gt == 2)
>  #define IS_SKL_GT3(dev_priv)	(IS_SKYLAKE(dev_priv) && \
Lee, Shawn C Sept. 26, 2018, 1:55 a.m. UTC | #2
On Tue, 2018-09-25 at 21:18 -0700, Souza, Jose wrote:
>> According to patch "drm/i915/aml: Introducing Amber Lake platform"
>> (e364672477a1). Add a new marco for AML ULX GT2 devices.
>
>Just to confirm, there is a newly added Amber lake id(
>https://patchwork.freedesktop.org/series/50037/) 0x87CA that is based in WHL/CFL, I guess this one will don't need to be added to
>IS_AML_ULX() too.
>If you agree with that:
>
>Reviewed-by: Jose Roberto de Souza <jose.souza@intel.com>
>

Yes, I think so too. We can add more which is based in WHL/CFL in the future. 

>> 
>> Cc: Jani Nikula <jani.nikula@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Jose Roberto de Souza <jose.souza@intel.com>
>> Signed-off-by: Lee, Shawn C <shawn.c.lee@intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h | 2 ++
>>  1 file changed, 2 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>> b/drivers/gpu/drm/i915/i915_drv.h index 808204a7ca7c..0c3de2d14db0 
>> 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -2461,6 +2461,8 @@ intel_info(const struct drm_i915_private
>> *dev_priv)
>>  #define IS_KBL_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x590E || \
>>  				 INTEL_DEVID(dev_priv) == 0x5915 || \
>>  				 INTEL_DEVID(dev_priv) == 0x591E)
>> +#define IS_AML_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x591C || \
>> +				 INTEL_DEVID(dev_priv) == 0x87C0)
>>  #define IS_SKL_GT2(dev_priv)	(IS_SKYLAKE(dev_priv) && \
>>  				 (dev_priv)->info.gt == 2)
>>  #define IS_SKL_GT3(dev_priv)	(IS_SKYLAKE(dev_priv) && \
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 808204a7ca7c..0c3de2d14db0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2461,6 +2461,8 @@  intel_info(const struct drm_i915_private *dev_priv)
 #define IS_KBL_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x590E || \
 				 INTEL_DEVID(dev_priv) == 0x5915 || \
 				 INTEL_DEVID(dev_priv) == 0x591E)
+#define IS_AML_ULX(dev_priv)	(INTEL_DEVID(dev_priv) == 0x591C || \
+				 INTEL_DEVID(dev_priv) == 0x87C0)
 #define IS_SKL_GT2(dev_priv)	(IS_SKYLAKE(dev_priv) && \
 				 (dev_priv)->info.gt == 2)
 #define IS_SKL_GT3(dev_priv)	(IS_SKYLAKE(dev_priv) && \