Message ID | 20181025144644.15464-12-cota@braap.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [RFC,v4,01/71] cpu: convert queued work to a QSIMPLEQ | expand |
On 10/25/18 3:45 PM, Emilio G. Cota wrote: > Signed-off-by: Emilio G. Cota <cota@braap.org> > --- > target/alpha/translate.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
Emilio G. Cota <cota@braap.org> writes: > Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> > --- > target/alpha/translate.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/target/alpha/translate.c b/target/alpha/translate.c > index e5d62850c5..25cd95931d 100644 > --- a/target/alpha/translate.c > +++ b/target/alpha/translate.c > @@ -1226,8 +1226,7 @@ static DisasJumpType gen_call_pal(DisasContext *ctx, int palcode) > /* WTINT */ > { > TCGv_i32 tmp = tcg_const_i32(1); > - tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) + > - offsetof(CPUState, halted)); > + gen_helper_cpu_halted_set(cpu_env, tmp); > tcg_temp_free_i32(tmp); > } > tcg_gen_movi_i64(ctx->ir[IR_V0], 0); > @@ -1382,8 +1381,7 @@ static DisasJumpType gen_mtpr(DisasContext *ctx, TCGv vb, int regno) > /* WAIT */ > { > TCGv_i32 tmp = tcg_const_i32(1); > - tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) + > - offsetof(CPUState, halted)); > + gen_helper_cpu_halted_set(cpu_env, tmp); > tcg_temp_free_i32(tmp); > } > return gen_excp(ctx, EXCP_HALTED, 0); -- Alex Bennée
diff --git a/target/alpha/translate.c b/target/alpha/translate.c index e5d62850c5..25cd95931d 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -1226,8 +1226,7 @@ static DisasJumpType gen_call_pal(DisasContext *ctx, int palcode) /* WTINT */ { TCGv_i32 tmp = tcg_const_i32(1); - tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) + - offsetof(CPUState, halted)); + gen_helper_cpu_halted_set(cpu_env, tmp); tcg_temp_free_i32(tmp); } tcg_gen_movi_i64(ctx->ir[IR_V0], 0); @@ -1382,8 +1381,7 @@ static DisasJumpType gen_mtpr(DisasContext *ctx, TCGv vb, int regno) /* WAIT */ { TCGv_i32 tmp = tcg_const_i32(1); - tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) + - offsetof(CPUState, halted)); + gen_helper_cpu_halted_set(cpu_env, tmp); tcg_temp_free_i32(tmp); } return gen_excp(ctx, EXCP_HALTED, 0);
Signed-off-by: Emilio G. Cota <cota@braap.org> --- target/alpha/translate.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)