diff mbox series

[RFC,v4,11/71] m68k: convert to helper_cpu_halted_set

Message ID 20181025144644.15464-11-cota@braap.org (mailing list archive)
State New, archived
Headers show
Series [RFC,v4,01/71] cpu: convert queued work to a QSIMPLEQ | expand

Commit Message

Emilio Cota Oct. 25, 2018, 2:45 p.m. UTC
Cc: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Emilio G. Cota <cota@braap.org>
---
 target/m68k/translate.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

Comments

Richard Henderson Oct. 26, 2018, 2:59 p.m. UTC | #1
On 10/25/18 3:45 PM, Emilio G. Cota wrote:
> Cc: Laurent Vivier <laurent@vivier.eu>
> Signed-off-by: Emilio G. Cota <cota@braap.org>
> ---
>  target/m68k/translate.c | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
Alex Bennée Oct. 31, 2018, 11:43 a.m. UTC | #2
Emilio G. Cota <cota@braap.org> writes:

> Cc: Laurent Vivier <laurent@vivier.eu>
> Signed-off-by: Emilio G. Cota <cota@braap.org>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

> ---
>  target/m68k/translate.c | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/target/m68k/translate.c b/target/m68k/translate.c
> index ae3651b867..d55e707cf6 100644
> --- a/target/m68k/translate.c
> +++ b/target/m68k/translate.c
> @@ -43,7 +43,6 @@
>  #undef DEFO32
>  #undef DEFO64
>
> -static TCGv_i32 cpu_halted;
>  static TCGv_i32 cpu_exception_index;
>
>  static char cpu_reg_names[2 * 8 * 3 + 5 * 4];
> @@ -79,9 +78,6 @@ void m68k_tcg_init(void)
>  #undef DEFO32
>  #undef DEFO64
>
> -    cpu_halted = tcg_global_mem_new_i32(cpu_env,
> -                                        -offsetof(M68kCPU, env) +
> -                                        offsetof(CPUState, halted), "HALTED");
>      cpu_exception_index = tcg_global_mem_new_i32(cpu_env,
>                                                   -offsetof(M68kCPU, env) +
>                                                   offsetof(CPUState, exception_index),
> @@ -4637,6 +4633,7 @@ DISAS_INSN(halt)
>  DISAS_INSN(stop)
>  {
>      uint16_t ext;
> +    TCGv_i32 tmp;
>
>      if (IS_USER(s)) {
>          gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE);
> @@ -4646,7 +4643,9 @@ DISAS_INSN(stop)
>      ext = read_im16(env, s);
>
>      gen_set_sr_im(s, ext, 0);
> -    tcg_gen_movi_i32(cpu_halted, 1);
> +    tmp = tcg_const_i32(1);
> +    gen_helper_cpu_halted_set(cpu_env, tmp);
> +    tcg_temp_free_i32(tmp);
>      gen_exception(s, s->pc, EXCP_HLT);
>  }


--
Alex Bennée
Laurent Vivier Oct. 31, 2018, 12:27 p.m. UTC | #3
On 25/10/2018 16:45, Emilio G. Cota wrote:
> Cc: Laurent Vivier <laurent@vivier.eu>
> Signed-off-by: Emilio G. Cota <cota@braap.org>
> ---
>  target/m68k/translate.c | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
diff mbox series

Patch

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index ae3651b867..d55e707cf6 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -43,7 +43,6 @@ 
 #undef DEFO32
 #undef DEFO64
 
-static TCGv_i32 cpu_halted;
 static TCGv_i32 cpu_exception_index;
 
 static char cpu_reg_names[2 * 8 * 3 + 5 * 4];
@@ -79,9 +78,6 @@  void m68k_tcg_init(void)
 #undef DEFO32
 #undef DEFO64
 
-    cpu_halted = tcg_global_mem_new_i32(cpu_env,
-                                        -offsetof(M68kCPU, env) +
-                                        offsetof(CPUState, halted), "HALTED");
     cpu_exception_index = tcg_global_mem_new_i32(cpu_env,
                                                  -offsetof(M68kCPU, env) +
                                                  offsetof(CPUState, exception_index),
@@ -4637,6 +4633,7 @@  DISAS_INSN(halt)
 DISAS_INSN(stop)
 {
     uint16_t ext;
+    TCGv_i32 tmp;
 
     if (IS_USER(s)) {
         gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE);
@@ -4646,7 +4643,9 @@  DISAS_INSN(stop)
     ext = read_im16(env, s);
 
     gen_set_sr_im(s, ext, 0);
-    tcg_gen_movi_i32(cpu_halted, 1);
+    tmp = tcg_const_i32(1);
+    gen_helper_cpu_halted_set(cpu_env, tmp);
+    tcg_temp_free_i32(tmp);
     gen_exception(s, s->pc, EXCP_HLT);
 }