diff mbox series

[v2,1/4] pinctrl: sh-pfc: Add physical pin multiplexing helper macros

Message ID 1542352851-25393-2-git-send-email-uli+renesas@fpond.eu (mailing list archive)
State Accepted
Delegated to: Geert Uytterhoeven
Headers show
Series I2C0/3/5 pin control for H3 and M3-W | expand

Commit Message

Ulrich Hecht Nov. 16, 2018, 7:20 a.m. UTC
Used by I2C controllers 0, 3 and 5 in R8A7795 and R8A7796 SoCs.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
---
 drivers/pinctrl/sh-pfc/sh_pfc.h | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

Comments

Geert Uytterhoeven Nov. 16, 2018, 8:42 a.m. UTC | #1
Hi Uli,

On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht <uli+renesas@fpond.eu> wrote:
> Used by I2C controllers 0, 3 and 5 in R8A7795 and R8A7796 SoCs.
>
> Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>

Thanks for your patch!

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Some bikeshedding below, which I believe would increase readability.

> --- a/drivers/pinctrl/sh-pfc/sh_pfc.h
> +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
> @@ -386,6 +386,28 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info;
>         PINMUX_DATA(fn##_MARK, FN_##msel, FN_##fn, FN_##ipsr)
>
>  /*
> + * Describe a pinmux configuration similar to PINMUX_IPSR_MSEL, but with
> + * an additional select register that controls physical multiplexing
> + * with another pin.
> + *   - ipsr: IPSR field
> + *   - fn: Function name, also referring to the IPSR field
> + *   - msel1: Physical multiplexing selector

psel?

> + *   - msel2: Module selector

msel?

> + */
> +#define PINMUX_IPSR_MSEL2(ipsr, fn, msel1, msel2) \

PINMUX_IPSR_PHYS_MSEL?

> +       PINMUX_DATA(fn##_MARK, FN_##msel1, FN_##msel2, FN_##fn, FN_##ipsr)
> +
> +/*
> + * Describe a pinmux configuration in which a pin is physically multiplexed
> + * with other pins.
> + *   - ipsr: IPSR field
> + *   - fn: Function name, also referring to the IPSR field
> + *   - msel: Phyiscal multiplexing selector

psel?
Physical

> + */
> +#define PINMUX_IPSR_PHYS(ipsr, fn, msel) \
> +       PINMUX_DATA(fn##_MARK, FN_##msel)
> +
> +/*
>   * Describe a pinmux configuration for a single-function pin with GPIO
>   * capability.
>   *   - fn: Function name

If you agree, I can fix up all of the above while applying.

Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Ulrich Hecht Nov. 16, 2018, 11:50 p.m. UTC | #2
> On November 16, 2018 at 9:42 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> 
> 
> Hi Uli,
> 
> On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht <uli+renesas@fpond.eu> wrote:
> > Used by I2C controllers 0, 3 and 5 in R8A7795 and R8A7796 SoCs.
> >
> > Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
> 
> Thanks for your patch!
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> Some bikeshedding below, which I believe would increase readability.
> 
> > --- a/drivers/pinctrl/sh-pfc/sh_pfc.h
> > +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
> > @@ -386,6 +386,28 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info;
> >         PINMUX_DATA(fn##_MARK, FN_##msel, FN_##fn, FN_##ipsr)
> >
> >  /*
> > + * Describe a pinmux configuration similar to PINMUX_IPSR_MSEL, but with
> > + * an additional select register that controls physical multiplexing
> > + * with another pin.
> > + *   - ipsr: IPSR field
> > + *   - fn: Function name, also referring to the IPSR field
> > + *   - msel1: Physical multiplexing selector
> 
> psel?
> 
> > + *   - msel2: Module selector
> 
> msel?
> 
> > + */
> > +#define PINMUX_IPSR_MSEL2(ipsr, fn, msel1, msel2) \
> 
> PINMUX_IPSR_PHYS_MSEL?
> 
> > +       PINMUX_DATA(fn##_MARK, FN_##msel1, FN_##msel2, FN_##fn, FN_##ipsr)
> > +
> > +/*
> > + * Describe a pinmux configuration in which a pin is physically multiplexed
> > + * with other pins.
> > + *   - ipsr: IPSR field
> > + *   - fn: Function name, also referring to the IPSR field
> > + *   - msel: Phyiscal multiplexing selector
> 
> psel?
> Physical
> 
> > + */
> > +#define PINMUX_IPSR_PHYS(ipsr, fn, msel) \
> > +       PINMUX_DATA(fn##_MARK, FN_##msel)
> > +
> > +/*
> >   * Describe a pinmux configuration for a single-function pin with GPIO
> >   * capability.
> >   *   - fn: Function name
> 
> If you agree, I can fix up all of the above while applying.

That would be fine with me, thank you.

CU
Uli
diff mbox series

Patch

diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
index 1fc1336..6bb9c6b 100644
--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -386,6 +386,28 @@  extern const struct sh_pfc_soc_info shx3_pinmux_info;
 	PINMUX_DATA(fn##_MARK, FN_##msel, FN_##fn, FN_##ipsr)
 
 /*
+ * Describe a pinmux configuration similar to PINMUX_IPSR_MSEL, but with
+ * an additional select register that controls physical multiplexing
+ * with another pin.
+ *   - ipsr: IPSR field
+ *   - fn: Function name, also referring to the IPSR field
+ *   - msel1: Physical multiplexing selector
+ *   - msel2: Module selector
+ */
+#define PINMUX_IPSR_MSEL2(ipsr, fn, msel1, msel2) \
+	PINMUX_DATA(fn##_MARK, FN_##msel1, FN_##msel2, FN_##fn, FN_##ipsr)
+
+/*
+ * Describe a pinmux configuration in which a pin is physically multiplexed
+ * with other pins.
+ *   - ipsr: IPSR field
+ *   - fn: Function name, also referring to the IPSR field
+ *   - msel: Phyiscal multiplexing selector
+ */
+#define PINMUX_IPSR_PHYS(ipsr, fn, msel) \
+	PINMUX_DATA(fn##_MARK, FN_##msel)
+
+/*
  * Describe a pinmux configuration for a single-function pin with GPIO
  * capability.
  *   - fn: Function name