diff mbox series

[v10,2/4] ARM: dts: rockchip: add VPU device node for RK3288

Message ID 20181121191652.22814-3-ezequiel@collabora.com (mailing list archive)
State New, archived
Headers show
Series Add Rockchip VPU JPEG encoder | expand

Commit Message

Ezequiel Garcia Nov. 21, 2018, 7:16 p.m. UTC
Add the Video Processing Unit node for RK3288 SoC.

Fix the VPU IOMMU node, which was disabled and lacking
its power domain property.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
 arch/arm/boot/dts/rk3288.dtsi | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

Comments

Tomasz Figa Nov. 22, 2018, 10:29 a.m. UTC | #1
Hi Ezequiel,

On Thu, Nov 22, 2018 at 4:17 AM Ezequiel Garcia <ezequiel@collabora.com> wrote:
>
> Add the Video Processing Unit node for RK3288 SoC.
>
> Fix the VPU IOMMU node, which was disabled and lacking
> its power domain property.
>
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> ---
>  arch/arm/boot/dts/rk3288.dtsi | 14 +++++++++++++-
>  1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index 0840ffb3205c..40d203cdca09 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -1223,6 +1223,18 @@
>                 };
>         };
>
> +       vpu: video-codec@ff9a0000 {
> +               compatible = "rockchip,rk3288-vpu";
> +               reg = <0x0 0xff9a0000 0x0 0x800>;
> +               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> +                            <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> +               interrupt-names = "vepu", "vdpu";
> +               clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
> +               clock-names = "aclk", "hclk";
> +               power-domains = <&power RK3288_PD_VIDEO>;
> +               iommus = <&vpu_mmu>;
> +       };
> +
>         vpu_mmu: iommu@ff9a0800 {
>                 compatible = "rockchip,iommu";
>                 reg = <0x0 0xff9a0800 0x0 0x100>;
> @@ -1230,8 +1242,8 @@
>                 interrupt-names = "vpu_mmu";
>                 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
>                 clock-names = "aclk", "iface";
> +               power-domains = <&power RK3288_PD_VIDEO>;
>                 #iommu-cells = <0>;
> -               status = "disabled";
>         };
>
>         hevc_mmu: iommu@ff9c0440 {

Reviewed-by: Tomasz Figa <tfiga@chromium.org>

Best regards,
Tomasz
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 0840ffb3205c..40d203cdca09 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1223,6 +1223,18 @@ 
 		};
 	};
 
+	vpu: video-codec@ff9a0000 {
+		compatible = "rockchip,rk3288-vpu";
+		reg = <0x0 0xff9a0000 0x0 0x800>;
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vepu", "vdpu";
+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+		clock-names = "aclk", "hclk";
+		power-domains = <&power RK3288_PD_VIDEO>;
+		iommus = <&vpu_mmu>;
+	};
+
 	vpu_mmu: iommu@ff9a0800 {
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff9a0800 0x0 0x100>;
@@ -1230,8 +1242,8 @@ 
 		interrupt-names = "vpu_mmu";
 		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3288_PD_VIDEO>;
 		#iommu-cells = <0>;
-		status = "disabled";
 	};
 
 	hevc_mmu: iommu@ff9c0440 {