Message ID | 20181118172903.4481-4-marek.vasut+renesas@gmail.com (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | [1/4] pinctrl: sh-pfc: r8a77965: Add CAN pins, groups and functions | expand |
On Sun, Nov 18, 2018 at 6:29 PM Marek Vasut <marek.vasut@gmail.com> wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > This patch adds CAN FD{0,1} pins, groups and functions to the R8A77990 > SoC. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in sh-pfc-for-v4.21. Gr{oetje,eeting}s, Geert
Hi Marek, On Mon, Nov 19, 2018 at 10:06 AM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > On Sun, Nov 18, 2018 at 6:29 PM Marek Vasut <marek.vasut@gmail.com> wrote: > > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > > This patch adds CAN FD{0,1} pins, groups and functions to the R8A77990 > > SoC. > > > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > i.e. will queue in sh-pfc-for-v4.21. Upon second look, the canfd groups and functions should be moved from the common to the automotive section, as RZ/G2E does not have them. As I have to update the array sizes anyway (my branch already has more patches applied), I moved them while applying. Please check the result later today, after I have pushed. Thanks! Gr{oetje,eeting}s, Geert
On 11/19/2018 10:47 AM, Geert Uytterhoeven wrote: > Hi Marek, Hi, > On Mon, Nov 19, 2018 at 10:06 AM Geert Uytterhoeven > <geert@linux-m68k.org> wrote: >> On Sun, Nov 18, 2018 at 6:29 PM Marek Vasut <marek.vasut@gmail.com> wrote: >>> From: Takeshi Kihara <takeshi.kihara.df@renesas.com> >>> >>> This patch adds CAN FD{0,1} pins, groups and functions to the R8A77990 >>> SoC. >>> >>> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> >>> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> >> >> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> >> i.e. will queue in sh-pfc-for-v4.21. > > Upon second look, the canfd groups and functions should be moved from > the common to the automotive section, as RZ/G2E does not have them. > As I have to update the array sizes anyway (my branch already has more > patches applied), I moved them while applying. > > Please check the result later today, after I have pushed. Looks OK to me. Incrementing the array sizes in the driver is kinda icky though.
Hi Marek, On Wed, Nov 21, 2018 at 12:33 AM Marek Vasut <marek.vasut@gmail.com> wrote: > On 11/19/2018 10:47 AM, Geert Uytterhoeven wrote: > > On Mon, Nov 19, 2018 at 10:06 AM Geert Uytterhoeven > > <geert@linux-m68k.org> wrote: > >> On Sun, Nov 18, 2018 at 6:29 PM Marek Vasut <marek.vasut@gmail.com> wrote: > >>> From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > >>> > >>> This patch adds CAN FD{0,1} pins, groups and functions to the R8A77990 > >>> SoC. > >>> > >>> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > >>> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> > >> > >> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > >> i.e. will queue in sh-pfc-for-v4.21. > > > > Upon second look, the canfd groups and functions should be moved from > > the common to the automotive section, as RZ/G2E does not have them. > > As I have to update the array sizes anyway (my branch already has more > > patches applied), I moved them while applying. > > > > Please check the result later today, after I have pushed. > > Looks OK to me. Incrementing the array sizes in the driver is kinda icky Thanks! > though. Unfortunately I see no way to avoid that, as both arrays need to be consecutive in memory. Do you see a better solution? Gr{oetje,eeting}s, Geert
On 11/21/2018 08:39 AM, Geert Uytterhoeven wrote: > Hi Marek, Hi, > On Wed, Nov 21, 2018 at 12:33 AM Marek Vasut <marek.vasut@gmail.com> wrote: >> On 11/19/2018 10:47 AM, Geert Uytterhoeven wrote: >>> On Mon, Nov 19, 2018 at 10:06 AM Geert Uytterhoeven >>> <geert@linux-m68k.org> wrote: >>>> On Sun, Nov 18, 2018 at 6:29 PM Marek Vasut <marek.vasut@gmail.com> wrote: >>>>> From: Takeshi Kihara <takeshi.kihara.df@renesas.com> >>>>> >>>>> This patch adds CAN FD{0,1} pins, groups and functions to the R8A77990 >>>>> SoC. >>>>> >>>>> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> >>>>> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> >>>> >>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> >>>> i.e. will queue in sh-pfc-for-v4.21. >>> >>> Upon second look, the canfd groups and functions should be moved from >>> the common to the automotive section, as RZ/G2E does not have them. >>> As I have to update the array sizes anyway (my branch already has more >>> patches applied), I moved them while applying. >>> >>> Please check the result later today, after I have pushed. >> >> Looks OK to me. Incrementing the array sizes in the driver is kinda icky > > Thanks! > >> though. > > Unfortunately I see no way to avoid that, as both arrays need to be consecutive > in memory. Do you see a better solution? U-Boot uses linker-generated lists , but I think this might be an overkill here.
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c index db000acc880c..96c2f4fcdb8e 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c @@ -1404,6 +1404,25 @@ static const unsigned int can_clk_mux[] = { CAN_CLK_MARK, }; +/* - CAN FD --------------------------------------------------------------- */ +static const unsigned int canfd0_data_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 13), +}; + +static const unsigned int canfd0_data_mux[] = { + CANFD0_TX_MARK, CANFD0_RX_MARK, +}; + +static const unsigned int canfd1_data_pins[] = { + /* TX, RX */ + RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 7), +}; + +static const unsigned int canfd1_data_mux[] = { + CANFD1_TX_MARK, CANFD1_RX_MARK, +}; + /* - DU --------------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { /* R[7:2], G[7:2], B[7:2] */ @@ -2635,7 +2654,7 @@ static const unsigned int usb30_id_mux[] = { }; static const struct { - struct sh_pfc_pin_group common[143]; + struct sh_pfc_pin_group common[145]; struct sh_pfc_pin_group automotive[0]; } pinmux_groups = { .common = { @@ -2649,6 +2668,8 @@ static const struct { SH_PFC_PIN_GROUP(can0_data), SH_PFC_PIN_GROUP(can1_data), SH_PFC_PIN_GROUP(can_clk), + SH_PFC_PIN_GROUP(canfd0_data), + SH_PFC_PIN_GROUP(canfd1_data), SH_PFC_PIN_GROUP(du_rgb666), SH_PFC_PIN_GROUP(du_rgb888), SH_PFC_PIN_GROUP(du_clk_in_0), @@ -2807,6 +2828,14 @@ static const char * const can_clk_groups[] = { "can_clk", }; +static const char * const canfd0_groups[] = { + "canfd0_data", +}; + +static const char * const canfd1_groups[] = { + "canfd1_data", +}; + static const char * const du_groups[] = { "du_rgb666", "du_rgb888", @@ -3034,7 +3063,7 @@ static const char * const usb30_groups[] = { }; static const struct { - struct sh_pfc_function common[35]; + struct sh_pfc_function common[37]; struct sh_pfc_function automotive[0]; } pinmux_functions = { .common = { @@ -3042,6 +3071,8 @@ static const struct { SH_PFC_FUNCTION(can0), SH_PFC_FUNCTION(can1), SH_PFC_FUNCTION(can_clk), + SH_PFC_FUNCTION(canfd0), + SH_PFC_FUNCTION(canfd1), SH_PFC_FUNCTION(du), SH_PFC_FUNCTION(i2c1), SH_PFC_FUNCTION(i2c2),