| Message ID | 48e7ce4d5e4c87a857cacbd01c427540c6bec002.1543131714.git.mesihkilinc@gmail.com (mailing list archive) |
|---|---|
| State | RFC, archived |
| Headers | show |
| Series | initial support for "suniv" Allwinner new ARM9 SoC | expand |
On Sun, 25 Nov 2018 10:43:11 +0300, Mesih Kilinc wrote: > Add compatible string for Allwinner suniv timer which is similar to > sun4i timer. > > Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com> > Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> > --- > Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt index 5c2e235..3da9d51 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt +++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt @@ -2,7 +2,9 @@ Allwinner A1X SoCs Timer Controller Required properties: -- compatible : should be "allwinner,sun4i-a10-timer" +- compatible : should be one of the following: + "allwinner,sun4i-a10-timer" + "allwinner,suniv-f1c100s-timer" - reg : Specifies base physical address and size of the registers. - interrupts : The interrupt of the first timer - clocks: phandle to the source clock (usually a 24 MHz fixed clock)