Message ID | 1540186308-4390-5-git-send-email-swati2.sharma@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Enable Y210, Y212, Y216 formats for ICL | expand |
Swati Sharma kirjoitti 22.10.2018 klo 8.31: > From: Vidya Srinivas <vidya.srinivas@intel.com> > > In this patch, a list for icl specific pixel formats is created > in which Y210, Y212 and Y216 pixel formats are added along with > legacy pixel formats for primary and sprite plane. > > v3: since support for planar formats on ICL was getting totally > skipped, added support for the same in intel_display.c and > intel_sprite.c. (juha) > > Signed-off-by: Swati Sharma <swati2.sharma@intel.com> > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 58 ++++++++++++++++++++++++++++++++---- > drivers/gpu/drm/i915/intel_sprite.c | 42 ++++++++++++++++++++++++-- > 2 files changed, 92 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 98f2939..f83fbb4 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -105,6 +105,42 @@ > DRM_FORMAT_NV12, > }; > > +static const uint32_t icl_primary_formats[] = { > + DRM_FORMAT_C8, > + DRM_FORMAT_RGB565, > + DRM_FORMAT_XRGB8888, > + DRM_FORMAT_XBGR8888, > + DRM_FORMAT_ARGB8888, > + DRM_FORMAT_ABGR8888, > + DRM_FORMAT_XRGB2101010, > + DRM_FORMAT_XBGR2101010, > + DRM_FORMAT_YUYV, > + DRM_FORMAT_YVYU, > + DRM_FORMAT_UYVY, > + DRM_FORMAT_VYUY, > + DRM_FORMAT_Y210, > + DRM_FORMAT_Y212, > + DRM_FORMAT_Y216, > +}; > + > +static const uint32_t icl_pri_planar_formats[] = { > + DRM_FORMAT_C8, > + DRM_FORMAT_RGB565, > + DRM_FORMAT_XRGB8888, > + DRM_FORMAT_XBGR8888, > + DRM_FORMAT_ARGB8888, > + DRM_FORMAT_ABGR8888, > + DRM_FORMAT_XRGB2101010, > + DRM_FORMAT_XBGR2101010, > + DRM_FORMAT_YUYV, > + DRM_FORMAT_YVYU, > + DRM_FORMAT_UYVY, > + DRM_FORMAT_VYUY, > + DRM_FORMAT_Y210, > + DRM_FORMAT_Y212, > + DRM_FORMAT_Y216, > +}; > + > static const uint64_t skl_format_modifiers_noccs[] = { > I915_FORMAT_MOD_Yf_TILED, > I915_FORMAT_MOD_Y_TILED, > @@ -13788,16 +13824,26 @@ bool skl_plane_has_planar(struct drm_i915_private *dev_priv, > fbc->possible_framebuffer_bits |= primary->frontbuffer_bit; > } > > + ^^ stray newline? The next if(){}else{} I would write separating gen11 from gen9 because you need both tables, primary_formats as well as pri_planar_formats, for gen11. So, instead of having if(>=gen9) { if(>=gen11) { .. } else { .. } } I'd write it like if(>=gen11) { .. } else if(>=gen9) { .. } els... I think it will be much easier to read. Same below in intel_sprite.c /Juha-Pekka > if (INTEL_GEN(dev_priv) >= 9) { > primary->has_ccs = skl_plane_has_ccs(dev_priv, pipe, > - PLANE_PRIMARY); > - > - if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) { > + PLANE_PRIMARY); > + > + if (skl_plane_has_planar(dev_priv, pipe, > + PLANE_PRIMARY)) { > + if (INTEL_GEN(dev_priv) >= 11) { > + intel_primary_formats = icl_primary_formats; > + num_formats = ARRAY_SIZE(icl_primary_formats); > + } else { > + intel_primary_formats = skl_primary_formats; > + num_formats = ARRAY_SIZE(skl_primary_formats); > + } > + } else if (INTEL_GEN(dev_priv) >= 11) { > + intel_primary_formats = icl_pri_planar_formats; > + num_formats = ARRAY_SIZE(icl_pri_planar_formats); > + } else { > intel_primary_formats = skl_pri_planar_formats; > num_formats = ARRAY_SIZE(skl_pri_planar_formats); > - } else { > - intel_primary_formats = skl_primary_formats; > - num_formats = ARRAY_SIZE(skl_primary_formats); > } > > if (primary->has_ccs) > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index c831360..7d9b3e4 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -1564,6 +1564,36 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data, > DRM_FORMAT_NV12, > }; > > +static uint32_t icl_plane_formats[] = { > + DRM_FORMAT_RGB565, > + DRM_FORMAT_ABGR8888, > + DRM_FORMAT_ARGB8888, > + DRM_FORMAT_XBGR8888, > + DRM_FORMAT_XRGB8888, > + DRM_FORMAT_YUYV, > + DRM_FORMAT_YVYU, > + DRM_FORMAT_UYVY, > + DRM_FORMAT_VYUY, > + DRM_FORMAT_Y210, > + DRM_FORMAT_Y212, > + DRM_FORMAT_Y216, > +}; > + > +static uint32_t icl_planar_formats[] = { > + DRM_FORMAT_RGB565, > + DRM_FORMAT_ABGR8888, > + DRM_FORMAT_ARGB8888, > + DRM_FORMAT_XBGR8888, > + DRM_FORMAT_XRGB8888, > + DRM_FORMAT_YUYV, > + DRM_FORMAT_YVYU, > + DRM_FORMAT_UYVY, > + DRM_FORMAT_VYUY, > + DRM_FORMAT_Y210, > + DRM_FORMAT_Y212, > + DRM_FORMAT_Y216, > +}; > + > static const uint64_t skl_plane_format_modifiers_noccs[] = { > I915_FORMAT_MOD_Yf_TILED, > I915_FORMAT_MOD_Y_TILED, > @@ -1822,8 +1852,16 @@ struct intel_plane * > > if (skl_plane_has_planar(dev_priv, pipe, > PLANE_SPRITE0 + plane)) { > - plane_formats = skl_planar_formats; > - num_plane_formats = ARRAY_SIZE(skl_planar_formats); > + if (INTEL_GEN(dev_priv) >= 11) { > + plane_formats = icl_planar_formats; > + num_plane_formats = ARRAY_SIZE(icl_planar_formats); > + } else { > + plane_formats = skl_planar_formats; > + num_plane_formats = ARRAY_SIZE(skl_planar_formats); > + } > + } else if (INTEL_GEN(dev_priv) >= 11) { > + plane_formats = icl_plane_formats; > + num_plane_formats = ARRAY_SIZE(icl_plane_formats); > } else { > plane_formats = skl_plane_formats; > num_plane_formats = ARRAY_SIZE(skl_plane_formats); >
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 98f2939..f83fbb4 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -105,6 +105,42 @@ DRM_FORMAT_NV12, }; +static const uint32_t icl_primary_formats[] = { + DRM_FORMAT_C8, + DRM_FORMAT_RGB565, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XRGB2101010, + DRM_FORMAT_XBGR2101010, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_Y210, + DRM_FORMAT_Y212, + DRM_FORMAT_Y216, +}; + +static const uint32_t icl_pri_planar_formats[] = { + DRM_FORMAT_C8, + DRM_FORMAT_RGB565, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XRGB2101010, + DRM_FORMAT_XBGR2101010, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_Y210, + DRM_FORMAT_Y212, + DRM_FORMAT_Y216, +}; + static const uint64_t skl_format_modifiers_noccs[] = { I915_FORMAT_MOD_Yf_TILED, I915_FORMAT_MOD_Y_TILED, @@ -13788,16 +13824,26 @@ bool skl_plane_has_planar(struct drm_i915_private *dev_priv, fbc->possible_framebuffer_bits |= primary->frontbuffer_bit; } + if (INTEL_GEN(dev_priv) >= 9) { primary->has_ccs = skl_plane_has_ccs(dev_priv, pipe, - PLANE_PRIMARY); - - if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) { + PLANE_PRIMARY); + + if (skl_plane_has_planar(dev_priv, pipe, + PLANE_PRIMARY)) { + if (INTEL_GEN(dev_priv) >= 11) { + intel_primary_formats = icl_primary_formats; + num_formats = ARRAY_SIZE(icl_primary_formats); + } else { + intel_primary_formats = skl_primary_formats; + num_formats = ARRAY_SIZE(skl_primary_formats); + } + } else if (INTEL_GEN(dev_priv) >= 11) { + intel_primary_formats = icl_pri_planar_formats; + num_formats = ARRAY_SIZE(icl_pri_planar_formats); + } else { intel_primary_formats = skl_pri_planar_formats; num_formats = ARRAY_SIZE(skl_pri_planar_formats); - } else { - intel_primary_formats = skl_primary_formats; - num_formats = ARRAY_SIZE(skl_primary_formats); } if (primary->has_ccs) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index c831360..7d9b3e4 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1564,6 +1564,36 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data, DRM_FORMAT_NV12, }; +static uint32_t icl_plane_formats[] = { + DRM_FORMAT_RGB565, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_Y210, + DRM_FORMAT_Y212, + DRM_FORMAT_Y216, +}; + +static uint32_t icl_planar_formats[] = { + DRM_FORMAT_RGB565, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_Y210, + DRM_FORMAT_Y212, + DRM_FORMAT_Y216, +}; + static const uint64_t skl_plane_format_modifiers_noccs[] = { I915_FORMAT_MOD_Yf_TILED, I915_FORMAT_MOD_Y_TILED, @@ -1822,8 +1852,16 @@ struct intel_plane * if (skl_plane_has_planar(dev_priv, pipe, PLANE_SPRITE0 + plane)) { - plane_formats = skl_planar_formats; - num_plane_formats = ARRAY_SIZE(skl_planar_formats); + if (INTEL_GEN(dev_priv) >= 11) { + plane_formats = icl_planar_formats; + num_plane_formats = ARRAY_SIZE(icl_planar_formats); + } else { + plane_formats = skl_planar_formats; + num_plane_formats = ARRAY_SIZE(skl_planar_formats); + } + } else if (INTEL_GEN(dev_priv) >= 11) { + plane_formats = icl_plane_formats; + num_plane_formats = ARRAY_SIZE(icl_plane_formats); } else { plane_formats = skl_plane_formats; num_plane_formats = ARRAY_SIZE(skl_plane_formats);