| Message ID | d856497c2ad879816c6f944128bc62371f604f7a.1543321707.git-series.maxime.ripard@bootlin.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: dts: sunxi: Cleanup DTC warnings | expand |
On Tue, Nov 27, 2018 at 8:47 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > Some boards override the MMC pin muxing settings in order to enable the > pull-ups and change the drive strength to a value higher than the default. > > While this was needed in the earlier days, this is now the default setting > for those pins, and therefore we don't need those board-specific settings > anymore. > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > --- > arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 4 ---- > arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 4 ---- > arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 4 ---- > arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 7 ------- > arch/arm/boot/dts/sun8i-q8-common.dtsi | 4 ---- > arch/arm/boot/dts/sun8i-r16-parrot.dts | 5 ----- > 6 files changed, 28 deletions(-) > [...] > diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > index b343153948f4..7e006d0fbf27 100644 > --- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > +++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > @@ -151,13 +151,6 @@ > status = "okay"; > }; > > -&mmc2_8bit_pins { > - /* Increase drive strength for DDR modes */ > - drive-strength = <40>; This is not the default. Maybe we should make it the default? > - /* eMMC is missing pull-ups */ > - bias-pull-up; > -}; > - > &ohci0 { > status = "okay"; > }; > diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi b/arch/arm/boot/dts/sun8i-q8-common.dtsi > index c676940a96da..0b3db925254b 100644 > --- a/arch/arm/boot/dts/sun8i-q8-common.dtsi > +++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi > @@ -82,10 +82,6 @@ > }; > }; > > -&mmc1_pins_a { > - bias-pull-up; > -}; > - > &r_pio { > wifi_pwrseq_pin_q8: wifi_pwrseq_pin@0 { > pins = "PL6", "PL7", "PL11"; > diff --git a/arch/arm/boot/dts/sun8i-r16-parrot.dts b/arch/arm/boot/dts/sun8i-r16-parrot.dts > index 472c03b7aeab..5d93a2711dc3 100644 > --- a/arch/arm/boot/dts/sun8i-r16-parrot.dts > +++ b/arch/arm/boot/dts/sun8i-r16-parrot.dts > @@ -156,11 +156,6 @@ > status = "okay"; > }; > > -&mmc2_8bit_pins { > - drive-strength = <40>; Same here. Otherwise, Acked-by: Chen-Yu Tsai <wens@csie.org> > - bias-pull-up; > -}; > - > &ohci0 { > status = "okay"; > }; > -- > git-series 0.9.1
Hi, On Wed, Nov 28, 2018 at 08:36:33PM +0800, Chen-Yu Tsai wrote: > On Tue, Nov 27, 2018 at 8:47 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > Some boards override the MMC pin muxing settings in order to enable the > > pull-ups and change the drive strength to a value higher than the default. > > > > While this was needed in the earlier days, this is now the default setting > > for those pins, and therefore we don't need those board-specific settings > > anymore. > > > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > > --- > > arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 4 ---- > > arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 4 ---- > > arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 4 ---- > > arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 7 ------- > > arch/arm/boot/dts/sun8i-q8-common.dtsi | 4 ---- > > arch/arm/boot/dts/sun8i-r16-parrot.dts | 5 ----- > > 6 files changed, 28 deletions(-) > > > > [...] > > > diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > > index b343153948f4..7e006d0fbf27 100644 > > --- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > > +++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > > @@ -151,13 +151,6 @@ > > status = "okay"; > > }; > > > > -&mmc2_8bit_pins { > > - /* Increase drive strength for DDR modes */ > > - drive-strength = <40>; > > This is not the default. Maybe we should make it the default? IIRC, you looked into the emmc standard some time ago, and you concluded that the default was 30mA. I don't really want to make it the default if only a couple of boards need it though. I've droped that part from the patch. Thanks! Maxime
On Wed, Nov 28, 2018 at 9:59 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > On Wed, Nov 28, 2018 at 08:36:33PM +0800, Chen-Yu Tsai wrote: > > On Tue, Nov 27, 2018 at 8:47 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > Some boards override the MMC pin muxing settings in order to enable the > > > pull-ups and change the drive strength to a value higher than the default. > > > > > > While this was needed in the earlier days, this is now the default setting > > > for those pins, and therefore we don't need those board-specific settings > > > anymore. > > > > > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > > > --- > > > arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 4 ---- > > > arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 4 ---- > > > arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 4 ---- > > > arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 7 ------- > > > arch/arm/boot/dts/sun8i-q8-common.dtsi | 4 ---- > > > arch/arm/boot/dts/sun8i-r16-parrot.dts | 5 ----- > > > 6 files changed, 28 deletions(-) > > > > > > > [...] > > > > > diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > > > index b343153948f4..7e006d0fbf27 100644 > > > --- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > > > +++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > > > @@ -151,13 +151,6 @@ > > > status = "okay"; > > > }; > > > > > > -&mmc2_8bit_pins { > > > - /* Increase drive strength for DDR modes */ > > > - drive-strength = <40>; > > > > This is not the default. Maybe we should make it the default? > > IIRC, you looked into the emmc standard some time ago, and you > concluded that the default was 30mA. > > I don't really want to make it the default if only a couple of boards > need it though. I've droped that part from the patch. IIRC you have both boards that have it? Could you test dropping the drive strength down to 30 mA? ChenYu
On Wed, Nov 28, 2018 at 10:30:55PM +0800, Chen-Yu Tsai wrote: > On Wed, Nov 28, 2018 at 9:59 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > On Wed, Nov 28, 2018 at 08:36:33PM +0800, Chen-Yu Tsai wrote: > > > On Tue, Nov 27, 2018 at 8:47 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > > > Some boards override the MMC pin muxing settings in order to enable the > > > > pull-ups and change the drive strength to a value higher than the default. > > > > > > > > While this was needed in the earlier days, this is now the default setting > > > > for those pins, and therefore we don't need those board-specific settings > > > > anymore. > > > > > > > > Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> > > > > --- > > > > arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 4 ---- > > > > arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 4 ---- > > > > arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 4 ---- > > > > arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 7 ------- > > > > arch/arm/boot/dts/sun8i-q8-common.dtsi | 4 ---- > > > > arch/arm/boot/dts/sun8i-r16-parrot.dts | 5 ----- > > > > 6 files changed, 28 deletions(-) > > > > > > > > > > [...] > > > > > > > diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > > > > index b343153948f4..7e006d0fbf27 100644 > > > > --- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > > > > +++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts > > > > @@ -151,13 +151,6 @@ > > > > status = "okay"; > > > > }; > > > > > > > > -&mmc2_8bit_pins { > > > > - /* Increase drive strength for DDR modes */ > > > > - drive-strength = <40>; > > > > > > This is not the default. Maybe we should make it the default? > > > > IIRC, you looked into the emmc standard some time ago, and you > > concluded that the default was 30mA. > > > > I don't really want to make it the default if only a couple of boards > > need it though. I've droped that part from the patch. > > IIRC you have both boards that have it? Could you test dropping > the drive strength down to 30 mA? I think I still do, I'll try to find the time to test this. Thanks! Maxime
diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts index 649e31339662..61a4702b63c1 100644 --- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts +++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts @@ -85,10 +85,6 @@ }; }; -&mmc1_pins_a { - bias-pull-up; -}; - &r_pio { wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin@0 { pins = "PL6"; diff --git a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts index 6b3bcae089f2..29a032164e3d 100644 --- a/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts +++ b/arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts @@ -78,10 +78,6 @@ }; }; -&mmc1_pins_a { - bias-pull-up; -}; - &r_pio { wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin@0 { pins = "PL6"; diff --git a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts index 3e05959104f1..f8a72d07467c 100644 --- a/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts +++ b/arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts @@ -70,10 +70,6 @@ }; }; -&mmc1_pins_a { - bias-pull-up; -}; - &mmc1 { pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins_a>; diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts index b343153948f4..7e006d0fbf27 100644 --- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts +++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts @@ -151,13 +151,6 @@ status = "okay"; }; -&mmc2_8bit_pins { - /* Increase drive strength for DDR modes */ - drive-strength = <40>; - /* eMMC is missing pull-ups */ - bias-pull-up; -}; - &ohci0 { status = "okay"; }; diff --git a/arch/arm/boot/dts/sun8i-q8-common.dtsi b/arch/arm/boot/dts/sun8i-q8-common.dtsi index c676940a96da..0b3db925254b 100644 --- a/arch/arm/boot/dts/sun8i-q8-common.dtsi +++ b/arch/arm/boot/dts/sun8i-q8-common.dtsi @@ -82,10 +82,6 @@ }; }; -&mmc1_pins_a { - bias-pull-up; -}; - &r_pio { wifi_pwrseq_pin_q8: wifi_pwrseq_pin@0 { pins = "PL6", "PL7", "PL11"; diff --git a/arch/arm/boot/dts/sun8i-r16-parrot.dts b/arch/arm/boot/dts/sun8i-r16-parrot.dts index 472c03b7aeab..5d93a2711dc3 100644 --- a/arch/arm/boot/dts/sun8i-r16-parrot.dts +++ b/arch/arm/boot/dts/sun8i-r16-parrot.dts @@ -156,11 +156,6 @@ status = "okay"; }; -&mmc2_8bit_pins { - drive-strength = <40>; - bias-pull-up; -}; - &ohci0 { status = "okay"; };
Some boards override the MMC pin muxing settings in order to enable the pull-ups and change the drive strength to a value higher than the default. While this was needed in the earlier days, this is now the default setting for those pins, and therefore we don't need those board-specific settings anymore. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> --- arch/arm/boot/dts/sun8i-a23-polaroid-mid2407pxe03.dts | 4 ---- arch/arm/boot/dts/sun8i-a23-polaroid-mid2809pxe04.dts | 4 ---- arch/arm/boot/dts/sun8i-a33-inet-d978-rev2.dts | 4 ---- arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 7 ------- arch/arm/boot/dts/sun8i-q8-common.dtsi | 4 ---- arch/arm/boot/dts/sun8i-r16-parrot.dts | 5 ----- 6 files changed, 28 deletions(-)