| Message ID | 1543675408-11382-1-git-send-email-ykaneko0929@gmail.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Simon Horman |
| Headers | show |
| Series | [PATCH/RFT] arm64: dts: renesas: r8a77990-ebisu: Add BD9571 PMIC | expand |
Hi Kaneko-san, On Sat, Dec 1, 2018 at 3:43 PM Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote: > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > This patch adds the regulator definition required for operation of > S2RAM. > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > @@ -425,6 +425,26 @@ > }; > }; > > +&i2c_dvfs { > + status = "okay"; > + > + clock-frequency = <400000>; > + > + pmic: pmic@30 { > + pinctrl-0 = <&irq0_pins>; > + pinctrl-names = "default"; > + > + compatible = "rohm,bd9571mwv"; > + reg = <0x30>; > + interrupt-parent = <&intc_ex>; > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > + interrupt-controller; > + #interrupt-cells = <2>; > + gpio-controller; > + #gpio-cells = <2>; Just adding this node is not sufficient to make S2RAM work. As per Documentation/devicetree/bindings/mfd/bd9571mwv.txt, you also have to describe the DDR-Backup Power configuration. On the Ebisu-4D development board, only the DDR0 power rail is used, and needs to be kept powered when backup mode is enabled. rohm,ddr-backup-power = <0x1>; rohm,rstbmode-level; Unfortunately resume from s2ram doesn't work with this, probably due to an issue in ATF. This may have been fixed in IPL and Secure Monitor Rev1.0.22, which claims to add support for the Ebisu-4D board. I don't know if plain Ebisu needs a different configuration. > + }; > +}; > + > &lvds0 { > status = "okay"; > The rest is fine, hence with the above fixed and tested: Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On Mon, Dec 03, 2018 at 09:25:30AM +0100, Geert Uytterhoeven wrote: > Hi Kaneko-san, > > On Sat, Dec 1, 2018 at 3:43 PM Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote: > > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > > This patch adds the regulator definition required for operation of > > S2RAM. > > > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> > > Thanks for your patch! > > > --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > > +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > > @@ -425,6 +425,26 @@ > > }; > > }; > > > > +&i2c_dvfs { > > + status = "okay"; > > + > > + clock-frequency = <400000>; > > + > > + pmic: pmic@30 { > > + pinctrl-0 = <&irq0_pins>; > > + pinctrl-names = "default"; > > + > > + compatible = "rohm,bd9571mwv"; > > + reg = <0x30>; > > + interrupt-parent = <&intc_ex>; > > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + gpio-controller; > > + #gpio-cells = <2>; > > Just adding this node is not sufficient to make S2RAM work. > As per Documentation/devicetree/bindings/mfd/bd9571mwv.txt, you also have > to describe the DDR-Backup Power configuration. > > On the Ebisu-4D development board, only the DDR0 power rail is used, and > needs to be kept powered when backup mode is enabled. > > rohm,ddr-backup-power = <0x1>; > rohm,rstbmode-level; > > Unfortunately resume from s2ram doesn't work with this, probably due to an > issue in ATF. This may have been fixed in IPL and Secure Monitor Rev1.0.22, > which claims to add support for the Ebisu-4D board. Thanks, do you know of any information on how to get IPL and Secure Monitor running / updated on Ebisu-4D? > I don't know if plain Ebisu needs a different configuration. > > > + }; > > +}; > > + > > &lvds0 { > > status = "okay"; > > > > The rest is fine, hence with the above fixed and tested: > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> I assume that working S2RAM is part of such testing. Is that correct?
Hi Simon, On Fri, Jan 4, 2019 at 2:27 PM Simon Horman <horms@verge.net.au> wrote: > On Mon, Dec 03, 2018 at 09:25:30AM +0100, Geert Uytterhoeven wrote: > > On Sat, Dec 1, 2018 at 3:43 PM Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote: > > > From: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > > > > This patch adds the regulator definition required for operation of > > > S2RAM. > > > > > > Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> > > > > Thanks for your patch! > > > > > --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > > > +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts > > > @@ -425,6 +425,26 @@ > > > }; > > > }; > > > > > > +&i2c_dvfs { > > > + status = "okay"; > > > + > > > + clock-frequency = <400000>; > > > + > > > + pmic: pmic@30 { > > > + pinctrl-0 = <&irq0_pins>; > > > + pinctrl-names = "default"; > > > + > > > + compatible = "rohm,bd9571mwv"; > > > + reg = <0x30>; > > > + interrupt-parent = <&intc_ex>; > > > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > > > + interrupt-controller; > > > + #interrupt-cells = <2>; > > > + gpio-controller; > > > + #gpio-cells = <2>; > > > > Just adding this node is not sufficient to make S2RAM work. > > As per Documentation/devicetree/bindings/mfd/bd9571mwv.txt, you also have > > to describe the DDR-Backup Power configuration. > > > > On the Ebisu-4D development board, only the DDR0 power rail is used, and > > needs to be kept powered when backup mode is enabled. > > > > rohm,ddr-backup-power = <0x1>; > > rohm,rstbmode-level; > > > > Unfortunately resume from s2ram doesn't work with this, probably due to an > > issue in ATF. This may have been fixed in IPL and Secure Monitor Rev1.0.22, > > which claims to add support for the Ebisu-4D board. > > Thanks, do you know of any information on how to get IPL and Secure Monitor > running / updated on Ebisu-4D? This is now working with upstream ATF (v2.0-763-ga45ccf135e48efc7) > > I don't know if plain Ebisu needs a different configuration. > > > > > + }; > > > +}; > > > + > > > &lvds0 { > > > status = "okay"; > > > > > > > The rest is fine, hence with the above fixed and tested: > > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > > I assume that working S2RAM is part of such testing. > Is that correct? That is correct. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts index 62bdddc..3eee419 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts @@ -425,6 +425,26 @@ }; }; +&i2c_dvfs { + status = "okay"; + + clock-frequency = <400000>; + + pmic: pmic@30 { + pinctrl-0 = <&irq0_pins>; + pinctrl-names = "default"; + + compatible = "rohm,bd9571mwv"; + reg = <0x30>; + interrupt-parent = <&intc_ex>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + &lvds0 { status = "okay"; @@ -480,6 +500,11 @@ function = "du"; }; + irq0_pins: irq0 { + groups = "intc_ex_irq0"; + function = "intc_ex"; + }; + pwm3_pins: pwm3 { groups = "pwm3_b"; function = "pwm3";