| Message ID | 20181204165248.17572-4-k.konieczny@partner.samsung.com (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | Add imem clock for Exynos 5433 | expand |
Quoting Kamil Konieczny (2018-12-04 08:52:46) > Document DT bindings for imem clock of the Samsung Exynos5433 SSS (Security > SubSystem) and SlimSSS IPs. > > Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> > --- Acked-by: Stephen Boyd <sboyd@kernel.org>
On Tue, 4 Dec 2018 17:52:46 +0100, Kamil Konieczny wrote: > Document DT bindings for imem clock of the Samsung Exynos5433 SSS (Security > SubSystem) and SlimSSS IPs. > > Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> > --- > .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ > 1 file changed, 23 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
Hi Kamil, On 2018년 12월 05일 01:52, Kamil Konieczny wrote: > Document DT bindings for imem clock of the Samsung Exynos5433 SSS (Security > SubSystem) and SlimSSS IPs. > > Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> > --- > .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ > 1 file changed, 23 insertions(+) Acked-by: Chanwoo Choi <cw00.choi@samsung.com> > > diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > index 50d5897c9849..183c327a7d6b 100644 > --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt > @@ -50,6 +50,8 @@ Required Properties: > IPs. > - "samsung,exynos5433-cmu-cam1" - clock controller compatible for CMU_CAM1 > which generates clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs. > + - "samsung,exynos5433-cmu-imem" - clock controller compatible for CMU_IMEM > + which generates clocks for SSS (Security SubSystem) and SlimSSS IPs. > > - reg: physical base address of the controller and length of memory mapped > region. > @@ -168,6 +170,12 @@ Required Properties: > - aclk_cam1_400 > - aclk_cam1_552 > > + Input clocks for imem clock controller: > + - oscclk > + - aclk_imem_sssx_266 > + - aclk_imem_266 > + - aclk_imem_200 > + > Optional properties: > - power-domains: a phandle to respective power domain node as described by > generic PM domain bindings (see power/power_domain.txt for more > @@ -469,6 +477,21 @@ Example 2: Examples of clock controller nodes are listed below. > power-domains = <&pd_cam1>; > }; > > + cmu_imem: clock-controller@11060000 { > + compatible = "samsung,exynos5433-cmu-imem"; > + reg = <0x11060000 0x1000>; > + #clock-cells = <1>; > + > + clock-names = "oscclk", > + "aclk_imem_sssx_266", > + "aclk_imem_266", > + "aclk_imem_200"; > + clocks = <&xxti>, > + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, > + <&cmu_top CLK_DIV_ACLK_IMEM_266>, > + <&cmu_top CLK_DIV_ACLK_IMEM_200>; > + }; > + > Example 3: UART controller node that consumes the clock generated by the clock > controller. > >
diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 50d5897c9849..183c327a7d6b 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -50,6 +50,8 @@ Required Properties: IPs. - "samsung,exynos5433-cmu-cam1" - clock controller compatible for CMU_CAM1 which generates clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs. + - "samsung,exynos5433-cmu-imem" - clock controller compatible for CMU_IMEM + which generates clocks for SSS (Security SubSystem) and SlimSSS IPs. - reg: physical base address of the controller and length of memory mapped region. @@ -168,6 +170,12 @@ Required Properties: - aclk_cam1_400 - aclk_cam1_552 + Input clocks for imem clock controller: + - oscclk + - aclk_imem_sssx_266 + - aclk_imem_266 + - aclk_imem_200 + Optional properties: - power-domains: a phandle to respective power domain node as described by generic PM domain bindings (see power/power_domain.txt for more @@ -469,6 +477,21 @@ Example 2: Examples of clock controller nodes are listed below. power-domains = <&pd_cam1>; }; + cmu_imem: clock-controller@11060000 { + compatible = "samsung,exynos5433-cmu-imem"; + reg = <0x11060000 0x1000>; + #clock-cells = <1>; + + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; + clocks = <&xxti>, + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + }; + Example 3: UART controller node that consumes the clock generated by the clock controller.
Document DT bindings for imem clock of the Samsung Exynos5433 SSS (Security SubSystem) and SlimSSS IPs. Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> --- .../bindings/clock/exynos5433-clock.txt | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+)