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[3/5] irqchip/irq-imx-gpcv2: Make use of BIT() macro

Message ID 20181206073125.7255-4-andrew.smirnov@gmail.com (mailing list archive)
State New, archived
Headers show
Series i.MX8MQ support for GPCv2 irqchip driver | expand

Commit Message

Andrey Smirnov Dec. 6, 2018, 7:31 a.m. UTC
Convert all instances of 1 << x to BIT(x) for consistency with other
kernel code.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: cphealy@gmail.com
Cc: l.stach@pengutronix.de
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/irqchip/irq-imx-gpcv2.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Lucas Stach Dec. 6, 2018, 11:12 a.m. UTC | #1
Am Mittwoch, den 05.12.2018, 23:31 -0800 schrieb Andrey Smirnov:
> Convert all instances of 1 << x to BIT(x) for consistency with other
> kernel code.
> 
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: cphealy@gmail.com
> Cc: l.stach@pengutronix.de
> Cc: Leonard Crestez <leonard.crestez@nxp.com>
> Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/irqchip/irq-imx-gpcv2.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-imx-gpcv2.c b/drivers/irqchip/irq-
> imx-gpcv2.c
> index b262ba8b2652..077d56b3183a 100644
> --- a/drivers/irqchip/irq-imx-gpcv2.c
> +++ b/drivers/irqchip/irq-imx-gpcv2.c
> @@ -78,7 +78,7 @@ static int imx_gpcv2_irq_set_wake(struct irq_data
> *d, unsigned int on)
>  	u32 mask, val;
>  
>  	raw_spin_lock_irqsave(&cd->rlock, flags);
> -	mask = 1 << d->hwirq % 32;
> +	mask = BIT(d->hwirq % 32);
>  	val = cd->wakeup_sources[idx];
>  
>  	cd->wakeup_sources[idx] = on ? (val & ~mask) : (val | mask);
> @@ -101,7 +101,7 @@ static void imx_gpcv2_irq_unmask(struct irq_data
> *d)
>  	raw_spin_lock(&cd->rlock);
>  	reg = gpcv2_idx_to_reg(cd, d->hwirq / 32);
>  	val = readl_relaxed(reg);
> -	val &= ~(1 << d->hwirq % 32);
> +	val &= ~BIT(d->hwirq % 32);
>  	writel_relaxed(val, reg);
>  	raw_spin_unlock(&cd->rlock);
>  
> @@ -117,7 +117,7 @@ static void imx_gpcv2_irq_mask(struct irq_data
> *d)
>  	raw_spin_lock(&cd->rlock);
>  	reg = gpcv2_idx_to_reg(cd, d->hwirq / 32);
>  	val = readl_relaxed(reg);
> -	val |= 1 << (d->hwirq % 32);
> +	val |= BIT(d->hwirq % 32);
>  	writel_relaxed(val, reg);
>  	raw_spin_unlock(&cd->rlock);
>
diff mbox series

Patch

diff --git a/drivers/irqchip/irq-imx-gpcv2.c b/drivers/irqchip/irq-imx-gpcv2.c
index b262ba8b2652..077d56b3183a 100644
--- a/drivers/irqchip/irq-imx-gpcv2.c
+++ b/drivers/irqchip/irq-imx-gpcv2.c
@@ -78,7 +78,7 @@  static int imx_gpcv2_irq_set_wake(struct irq_data *d, unsigned int on)
 	u32 mask, val;
 
 	raw_spin_lock_irqsave(&cd->rlock, flags);
-	mask = 1 << d->hwirq % 32;
+	mask = BIT(d->hwirq % 32);
 	val = cd->wakeup_sources[idx];
 
 	cd->wakeup_sources[idx] = on ? (val & ~mask) : (val | mask);
@@ -101,7 +101,7 @@  static void imx_gpcv2_irq_unmask(struct irq_data *d)
 	raw_spin_lock(&cd->rlock);
 	reg = gpcv2_idx_to_reg(cd, d->hwirq / 32);
 	val = readl_relaxed(reg);
-	val &= ~(1 << d->hwirq % 32);
+	val &= ~BIT(d->hwirq % 32);
 	writel_relaxed(val, reg);
 	raw_spin_unlock(&cd->rlock);
 
@@ -117,7 +117,7 @@  static void imx_gpcv2_irq_mask(struct irq_data *d)
 	raw_spin_lock(&cd->rlock);
 	reg = gpcv2_idx_to_reg(cd, d->hwirq / 32);
 	val = readl_relaxed(reg);
-	val |= 1 << (d->hwirq % 32);
+	val |= BIT(d->hwirq % 32);
 	writel_relaxed(val, reg);
 	raw_spin_unlock(&cd->rlock);