| Message ID | 1545251294-28136-1-git-send-email-sunpeng.li@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/amd/display: Fix 64-bit division for 32-bit builds | expand |
On 2018-12-19 3:28 p.m., sunpeng.li@amd.com wrote: > From: Ken Chalmers <ken.chalmers@amd.com> > > [Why] > 32-bit builds break when doing 64-bit division directly. > > [How] > Use the div_u64() function instead to perform the division. > > Fixes: https://lists.freedesktop.org/archives/dri-devel/2018-December/201008.html > Signed-off-by: Ken Chalmers <ken.chalmers@amd.com> > Reviewed-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Harry > --- > drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c > index 5c629ae..8b5ce55 100644 > --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c > +++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c > @@ -94,7 +94,7 @@ static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) > if (pix_clk_100hz == 0) > return; > > - pix_dur = 10000000000ull / pix_clk_100hz; > + pix_dur = div_u64(10000000000ull, pix_clk_100hz); > > set_reg_field_value( > value, >
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c index 5c629ae..8b5ce55 100644 --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c @@ -94,7 +94,7 @@ static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) if (pix_clk_100hz == 0) return; - pix_dur = 10000000000ull / pix_clk_100hz; + pix_dur = div_u64(10000000000ull, pix_clk_100hz); set_reg_field_value( value,