| Message ID | 20181219181650.27105-1-matthias.bgg@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | clk: mediatek: Mark bus and DRAM related clocks as critical | expand |
Hi Jasper,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on v4.20-rc7 next-20181220]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/matthias-bgg-kernel-org/clk-mediatek-Mark-bus-and-DRAM-related-clocks-as-critical/20181220-190521
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: xtensa-allmodconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 8.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=8.1.0 make.cross ARCH=xtensa
All error/warnings (new ones prefixed by >>):
>> drivers/clk/mediatek/clk-mt6797.c:334:2: error: implicit declaration of function 'MUX_FLAGS'; did you mean 'MUX_GATE'? [-Werror=implicit-function-declaration]
MUX_FLAGS(CLK_TOP_MUX_DDRPHYCFG, "ddrphycfg_sel", ddrphycfg_parents,
^~~~~~~~~
MUX_GATE
drivers/clk/mediatek/clk-mt6797.c:334:2: error: initializer element is not constant
drivers/clk/mediatek/clk-mt6797.c:334:2: note: (near initialization for 'top_muxes[3].id')
drivers/clk/mediatek/clk-mt6797.c:336:2: warning: braces around scalar initializer
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mt6797.c:336:2: note: (near initialization for 'top_muxes[3].name')
In file included from drivers/clk/mediatek/clk-mt6797.c:20:
drivers/clk/mediatek/clk-mtk.h:115:3: error: field name not in record or union initializer
.id = _id, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mtk.h:115:3: note: (near initialization for 'top_muxes[3].name')
.id = _id, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
>> include/dt-bindings/clock/mt6797-clk.h:24:27: warning: initialization of 'const char *' from 'int' makes pointer from integer without a cast [-Wint-conversion]
#define CLK_TOP_MUX_MM 6
^
drivers/clk/mediatek/clk-mtk.h:115:9: note: in definition of macro 'MUX'
.id = _id, \
^~~
drivers/clk/mediatek/clk-mt6797.c:336:6: note: in expansion of macro 'CLK_TOP_MUX_MM'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~~~~~~~~~~~~
include/dt-bindings/clock/mt6797-clk.h:24:27: note: (near initialization for 'top_muxes[3].name')
#define CLK_TOP_MUX_MM 6
^
drivers/clk/mediatek/clk-mtk.h:115:9: note: in definition of macro 'MUX'
.id = _id, \
^~~
drivers/clk/mediatek/clk-mt6797.c:336:6: note: in expansion of macro 'CLK_TOP_MUX_MM'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mtk.h:116:3: error: field name not in record or union initializer
.name = _name, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mtk.h:116:3: note: (near initialization for 'top_muxes[3].name')
.name = _name, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mt6797.c:336:22: warning: excess elements in scalar initializer
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:116:11: note: in definition of macro 'MUX'
.name = _name, \
^~~~~
drivers/clk/mediatek/clk-mt6797.c:336:22: note: (near initialization for 'top_muxes[3].name')
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:116:11: note: in definition of macro 'MUX'
.name = _name, \
^~~~~
drivers/clk/mediatek/clk-mtk.h:117:3: error: field name not in record or union initializer
.mux_reg = _reg, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mtk.h:117:3: note: (near initialization for 'top_muxes[3].name')
.mux_reg = _reg, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mt6797.c:337:6: warning: excess elements in scalar initializer
0x0040, 24, 2),
^~~~~~
drivers/clk/mediatek/clk-mtk.h:117:14: note: in definition of macro 'MUX'
.mux_reg = _reg, \
^~~~
drivers/clk/mediatek/clk-mt6797.c:337:6: note: (near initialization for 'top_muxes[3].name')
0x0040, 24, 2),
^~~~~~
drivers/clk/mediatek/clk-mtk.h:117:14: note: in definition of macro 'MUX'
.mux_reg = _reg, \
^~~~
drivers/clk/mediatek/clk-mtk.h:118:3: error: field name not in record or union initializer
.mux_shift = _shift, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mtk.h:118:3: note: (near initialization for 'top_muxes[3].name')
.mux_shift = _shift, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mt6797.c:337:14: warning: excess elements in scalar initializer
0x0040, 24, 2),
^~
drivers/clk/mediatek/clk-mtk.h:118:16: note: in definition of macro 'MUX'
.mux_shift = _shift, \
^~~~~~
drivers/clk/mediatek/clk-mt6797.c:337:14: note: (near initialization for 'top_muxes[3].name')
0x0040, 24, 2),
^~
drivers/clk/mediatek/clk-mtk.h:118:16: note: in definition of macro 'MUX'
.mux_shift = _shift, \
^~~~~~
drivers/clk/mediatek/clk-mtk.h:119:3: error: field name not in record or union initializer
.mux_width = _width, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mtk.h:119:3: note: (near initialization for 'top_muxes[3].name')
.mux_width = _width, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
--
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mtk.h:123:3: note: (near initialization for 'top_muxes[3].name')
.num_parents = ARRAY_SIZE(_parents), \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
In file included from include/linux/list.h:9,
from include/linux/kobject.h:19,
from include/linux/of.h:17,
from drivers/clk/mediatek/clk-mt6797.c:15:
include/linux/kernel.h:72:25: warning: excess elements in scalar initializer
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
^
drivers/clk/mediatek/clk-mtk.h:123:18: note: in expansion of macro 'ARRAY_SIZE'
.num_parents = ARRAY_SIZE(_parents), \
^~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
include/linux/kernel.h:72:25: note: (near initialization for 'top_muxes[3].name')
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
^
drivers/clk/mediatek/clk-mtk.h:123:18: note: in expansion of macro 'ARRAY_SIZE'
.num_parents = ARRAY_SIZE(_parents), \
^~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
In file included from drivers/clk/mediatek/clk-mt6797.c:20:
drivers/clk/mediatek/clk-mtk.h:124:3: error: field name not in record or union initializer
.flags = CLK_SET_RATE_PARENT, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mtk.h:124:3: note: (near initialization for 'top_muxes[3].name')
.flags = CLK_SET_RATE_PARENT, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
In file included from include/linux/bitops.h:5,
from include/linux/of.h:15,
from drivers/clk/mediatek/clk-mt6797.c:15:
include/linux/bits.h:6:19: warning: excess elements in scalar initializer
#define BIT(nr) (1UL << (nr))
^
include/linux/clk-provider.h:24:29: note: in expansion of macro 'BIT'
#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
^~~
drivers/clk/mediatek/clk-mtk.h:124:12: note: in expansion of macro 'CLK_SET_RATE_PARENT'
.flags = CLK_SET_RATE_PARENT, \
^~~~~~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
include/linux/bits.h:6:19: note: (near initialization for 'top_muxes[3].name')
#define BIT(nr) (1UL << (nr))
^
include/linux/clk-provider.h:24:29: note: in expansion of macro 'BIT'
#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
^~~
drivers/clk/mediatek/clk-mtk.h:124:12: note: in expansion of macro 'CLK_SET_RATE_PARENT'
.flags = CLK_SET_RATE_PARENT, \
^~~~~~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mt6797.c:327:49: warning: missing braces around initializer [-Wmissing-braces]
static const struct mtk_composite top_muxes[] = {
^
drivers/clk/mediatek/clk-mt6797.c:334:2:
MUX_FLAGS(CLK_TOP_MUX_DDRPHYCFG, "ddrphycfg_sel", ddrphycfg_parents,
{
drivers/clk/mediatek/clk-mt6797.c:338:2: warning: braces around scalar initializer
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: (near initialization for 'top_muxes[3].parent_names')
In file included from drivers/clk/mediatek/clk-mt6797.c:20:
drivers/clk/mediatek/clk-mtk.h:93:3: error: field name not in record or union initializer
.id = _id, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:93:3: note: (near initialization for 'top_muxes[3].parent_names')
.id = _id, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
>> include/dt-bindings/clock/mt6797-clk.h:25:28: warning: initialization of 'const char * const*' from 'int' makes pointer from integer without a cast [-Wint-conversion]
#define CLK_TOP_MUX_PWM 7
^
drivers/clk/mediatek/clk-mtk.h:93:9: note: in definition of macro 'MUX_GATE_FLAGS'
.id = _id, \
^~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:11: note: in expansion of macro 'CLK_TOP_MUX_PWM'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~~~~~~~~
include/dt-bindings/clock/mt6797-clk.h:25:28: note: (near initialization for 'top_muxes[3].parent_names')
#define CLK_TOP_MUX_PWM 7
^
drivers/clk/mediatek/clk-mtk.h:93:9: note: in definition of macro 'MUX_GATE_FLAGS'
.id = _id, \
^~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:11: note: in expansion of macro 'CLK_TOP_MUX_PWM'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mtk.h:94:3: error: field name not in record or union initializer
.name = _name, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:94:3: note: (near initialization for 'top_muxes[3].parent_names')
.name = _name, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:28: warning: excess elements in scalar initializer
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~~
drivers/clk/mediatek/clk-mtk.h:94:11: note: in definition of macro 'MUX_GATE_FLAGS'
.name = _name, \
^~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:28: note: (near initialization for 'top_muxes[3].parent_names')
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~~
drivers/clk/mediatek/clk-mtk.h:94:11: note: in definition of macro 'MUX_GATE_FLAGS'
.name = _name, \
^~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:95:3: error: field name not in record or union initializer
.mux_reg = _reg, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:95:3: note: (near initialization for 'top_muxes[3].parent_names')
.mux_reg = _reg, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:52: warning: excess elements in scalar initializer
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~
drivers/clk/mediatek/clk-mtk.h:95:14: note: in definition of macro 'MUX_GATE_FLAGS'
.mux_reg = _reg, \
^~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:52: note: (near initialization for 'top_muxes[3].parent_names')
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~
drivers/clk/mediatek/clk-mtk.h:95:14: note: in definition of macro 'MUX_GATE_FLAGS'
.mux_reg = _reg, \
^~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:96:3: error: field name not in record or union initializer
.mux_shift = _shift, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
..
vim +334 drivers/clk/mediatek/clk-mt6797.c
326
327 static const struct mtk_composite top_muxes[] = {
328 MUX(CLK_TOP_MUX_ULPOSC_AXI_CK_MUX_PRE, "ulposc_axi_ck_mux_pre",
329 ulposc_axi_ck_mux_pre_parents, 0x0040, 3, 1),
330 MUX(CLK_TOP_MUX_ULPOSC_AXI_CK_MUX, "ulposc_axi_ck_mux",
331 ulposc_axi_ck_mux_parents, 0x0040, 2, 1),
332 MUX(CLK_TOP_MUX_AXI, "axi_sel", axi_parents,
333 0x0040, 0, 2),
> 334 MUX_FLAGS(CLK_TOP_MUX_DDRPHYCFG, "ddrphycfg_sel", ddrphycfg_parents,
335 0x0040, 16, 2, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
336 MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
337 0x0040, 24, 2),
338 MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
339 MUX_GATE(CLK_TOP_MUX_VDEC, "vdec_sel", vdec_parents, 0x0050, 8, 3, 15),
340 MUX_GATE(CLK_TOP_MUX_VENC, "venc_sel", venc_parents, 0x0050, 16, 2, 23),
341 MUX_GATE(CLK_TOP_MUX_MFG, "mfg_sel", mfg_parents, 0x0050, 24, 2, 31),
342 MUX_GATE(CLK_TOP_MUX_CAMTG, "camtg_sel", camtg, 0x0060, 0, 2, 7),
343 MUX_GATE(CLK_TOP_MUX_UART, "uart_sel", uart_parents, 0x0060, 8, 1, 15),
344 MUX_GATE(CLK_TOP_MUX_SPI, "spi_sel", spi_parents, 0x0060, 16, 2, 23),
345 MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
346 ulposc_spi_ck_mux_parents, 0x0060, 18, 1),
347 MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
348 0x0060, 24, 2, 31),
349 MUX(CLK_TOP_MUX_MSDC50_0_HCLK, "msdc50_0_hclk_sel",
350 msdc50_0_hclk_parents, 0x0070, 8, 2),
351 MUX_GATE(CLK_TOP_MUX_MSDC50_0, "msdc50_0_sel", msdc50_0_parents,
352 0x0070, 16, 4, 23),
353 MUX_GATE(CLK_TOP_MUX_MSDC30_1, "msdc30_1_sel", msdc30_1_parents,
354 0x0070, 24, 3, 31),
355 MUX_GATE(CLK_TOP_MUX_MSDC30_2, "msdc30_2_sel", msdc30_2_parents,
356 0x0080, 0, 3, 7),
357 MUX_GATE(CLK_TOP_MUX_AUDIO, "audio_sel", audio_parents,
358 0x0080, 16, 2, 23),
359 MUX(CLK_TOP_MUX_AUD_INTBUS, "aud_intbus_sel", aud_intbus_parents,
360 0x0080, 24, 2),
361 MUX(CLK_TOP_MUX_PMICSPI, "pmicspi_sel", pmicspi_parents,
362 0x0090, 0, 3),
363 MUX(CLK_TOP_MUX_SCP, "scp_sel", scp_parents,
364 0x0090, 8, 2),
365 MUX(CLK_TOP_MUX_ATB, "atb_sel", atb_parents,
366 0x0090, 16, 2),
367 MUX_GATE(CLK_TOP_MUX_MJC, "mjc_sel", mjc_parents, 0x0090, 24, 2, 31),
368 MUX_GATE(CLK_TOP_MUX_DPI0, "dpi0_sel", dpi0_parents, 0x00A0, 0, 3, 7),
369 MUX_GATE(CLK_TOP_MUX_AUD_1, "aud_1_sel", aud_1_parents,
370 0x00A0, 16, 1, 23),
371 MUX_GATE(CLK_TOP_MUX_AUD_2, "aud_2_sel", aud_2_parents,
372 0x00A0, 24, 1, 31),
373 MUX(CLK_TOP_MUX_SSUSB_TOP_SYS, "ssusb_top_sys_sel",
374 ssusb_top_sys_parents, 0x00B0, 8, 1),
375 MUX(CLK_TOP_MUX_SPM, "spm_sel", spm_parents,
376 0x00C0, 0, 1),
377 MUX(CLK_TOP_MUX_BSI_SPI, "bsi_spi_sel", bsi_spi_parents,
378 0x00C0, 8, 2),
379 MUX_GATE(CLK_TOP_MUX_AUDIO_H, "audio_h_sel", audio_h_parents,
380 0x00C0, 16, 2, 23),
381 MUX_GATE(CLK_TOP_MUX_ANC_MD32, "anc_md32_sel", anc_md32_parents,
382 0x00C0, 24, 2, 31),
383 MUX(CLK_TOP_MUX_MFG_52M, "mfg_52m_sel", mfg_52m_parents,
384 0x0104, 1, 2),
385 };
386
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
Hi Jasper,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on v4.20-rc7 next-20181220]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/matthias-bgg-kernel-org/clk-mediatek-Mark-bus-and-DRAM-related-clocks-as-critical/20181220-190521
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: nds32-allmodconfig (attached as .config)
compiler: nds32le-linux-gcc (GCC) 6.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=6.4.0 make.cross ARCH=nds32
All error/warnings (new ones prefixed by >>):
^~~
drivers/clk/mediatek/clk-mtk.h:122:3: error: field name not in record or union initializer
.parent_names = _parents, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mtk.h:122:3: note: (near initialization for 'top_muxes[3].name')
.parent_names = _parents, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mt6797.c:336:32: warning: excess elements in scalar initializer
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^
drivers/clk/mediatek/clk-mtk.h:122:19: note: in definition of macro 'MUX'
.parent_names = _parents, \
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:336:32: note: (near initialization for 'top_muxes[3].name')
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^
drivers/clk/mediatek/clk-mtk.h:122:19: note: in definition of macro 'MUX'
.parent_names = _parents, \
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:123:3: error: field name not in record or union initializer
.num_parents = ARRAY_SIZE(_parents), \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mtk.h:123:3: note: (near initialization for 'top_muxes[3].name')
.num_parents = ARRAY_SIZE(_parents), \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
In file included from include/linux/list.h:9:0,
from include/linux/kobject.h:19,
from include/linux/of.h:17,
from drivers/clk/mediatek/clk-mt6797.c:15:
include/linux/kernel.h:72:25: warning: excess elements in scalar initializer
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
^
drivers/clk/mediatek/clk-mtk.h:123:18: note: in expansion of macro 'ARRAY_SIZE'
.num_parents = ARRAY_SIZE(_parents), \
^~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
include/linux/kernel.h:72:25: note: (near initialization for 'top_muxes[3].name')
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
^
drivers/clk/mediatek/clk-mtk.h:123:18: note: in expansion of macro 'ARRAY_SIZE'
.num_parents = ARRAY_SIZE(_parents), \
^~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
In file included from drivers/clk/mediatek/clk-mt6797.c:20:0:
drivers/clk/mediatek/clk-mtk.h:124:3: error: field name not in record or union initializer
.flags = CLK_SET_RATE_PARENT, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mtk.h:124:3: note: (near initialization for 'top_muxes[3].name')
.flags = CLK_SET_RATE_PARENT, \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
In file included from include/linux/bitops.h:5:0,
from include/linux/of.h:15,
from drivers/clk/mediatek/clk-mt6797.c:15:
include/linux/bits.h:6:19: warning: excess elements in scalar initializer
#define BIT(nr) (1UL << (nr))
^
include/linux/clk-provider.h:24:29: note: in expansion of macro 'BIT'
#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
^~~
drivers/clk/mediatek/clk-mtk.h:124:12: note: in expansion of macro 'CLK_SET_RATE_PARENT'
.flags = CLK_SET_RATE_PARENT, \
^~~~~~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
include/linux/bits.h:6:19: note: (near initialization for 'top_muxes[3].name')
#define BIT(nr) (1UL << (nr))
^
include/linux/clk-provider.h:24:29: note: in expansion of macro 'BIT'
#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
^~~
drivers/clk/mediatek/clk-mtk.h:124:12: note: in expansion of macro 'CLK_SET_RATE_PARENT'
.flags = CLK_SET_RATE_PARENT, \
^~~~~~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
In file included from drivers/clk/mediatek/clk-mt6797.c:20:0:
>> drivers/clk/mediatek/clk-mtk.h:114:57: warning: missing braces around initializer [-Wmissing-braces]
#define MUX(_id, _name, _parents, _reg, _shift, _width) { \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mtk.h:114:57: note: (near initialization for 'top_muxes[3].name')
#define MUX(_id, _name, _parents, _reg, _shift, _width) { \
^
drivers/clk/mediatek/clk-mt6797.c:336:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
^~~
drivers/clk/mediatek/clk-mt6797.c:338:2: warning: braces around scalar initializer
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: (near initialization for 'top_muxes[3].parent_names')
In file included from drivers/clk/mediatek/clk-mt6797.c:20:0:
drivers/clk/mediatek/clk-mtk.h:93:3: error: field name not in record or union initializer
.id = _id, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:93:3: note: (near initialization for 'top_muxes[3].parent_names')
.id = _id, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
include/dt-bindings/clock/mt6797-clk.h:25:28: warning: initialization makes pointer from integer without a cast [-Wint-conversion]
#define CLK_TOP_MUX_PWM 7
^
drivers/clk/mediatek/clk-mtk.h:93:9: note: in definition of macro 'MUX_GATE_FLAGS'
.id = _id, \
^~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:11: note: in expansion of macro 'CLK_TOP_MUX_PWM'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~~~~~~~~
include/dt-bindings/clock/mt6797-clk.h:25:28: note: (near initialization for 'top_muxes[3].parent_names')
#define CLK_TOP_MUX_PWM 7
^
drivers/clk/mediatek/clk-mtk.h:93:9: note: in definition of macro 'MUX_GATE_FLAGS'
.id = _id, \
^~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:11: note: in expansion of macro 'CLK_TOP_MUX_PWM'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mtk.h:94:3: error: field name not in record or union initializer
.name = _name, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:94:3: note: (near initialization for 'top_muxes[3].parent_names')
.name = _name, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:28: warning: excess elements in scalar initializer
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^
drivers/clk/mediatek/clk-mtk.h:94:11: note: in definition of macro 'MUX_GATE_FLAGS'
.name = _name, \
^~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:338:28: note: (near initialization for 'top_muxes[3].parent_names')
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^
drivers/clk/mediatek/clk-mtk.h:94:11: note: in definition of macro 'MUX_GATE_FLAGS'
.name = _name, \
^~~~~
drivers/clk/mediatek/clk-mt6797.c:338:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:95:3: error: field name not in record or union initializer
.mux_reg = _reg, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
--
^~~
drivers/clk/mediatek/clk-mtk.h:122:3: error: field name not in record or union initializer
.parent_names = _parents, \
^
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
drivers/clk/mediatek/clk-mtk.h:122:3: note: (near initialization for 'top_muxes[3].mux_width')
.parent_names = _parents, \
^
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
drivers/clk/mediatek/clk-mt6797.c:346:6: warning: excess elements in scalar initializer
ulposc_spi_ck_mux_parents, 0x0060, 18, 1),
^
drivers/clk/mediatek/clk-mtk.h:122:19: note: in definition of macro 'MUX'
.parent_names = _parents, \
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:346:6: note: (near initialization for 'top_muxes[3].mux_width')
ulposc_spi_ck_mux_parents, 0x0060, 18, 1),
^
drivers/clk/mediatek/clk-mtk.h:122:19: note: in definition of macro 'MUX'
.parent_names = _parents, \
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:123:3: error: field name not in record or union initializer
.num_parents = ARRAY_SIZE(_parents), \
^
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
drivers/clk/mediatek/clk-mtk.h:123:3: note: (near initialization for 'top_muxes[3].mux_width')
.num_parents = ARRAY_SIZE(_parents), \
^
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
In file included from include/linux/list.h:9:0,
from include/linux/kobject.h:19,
from include/linux/of.h:17,
from drivers/clk/mediatek/clk-mt6797.c:15:
include/linux/kernel.h:72:25: warning: excess elements in scalar initializer
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
^
drivers/clk/mediatek/clk-mtk.h:123:18: note: in expansion of macro 'ARRAY_SIZE'
.num_parents = ARRAY_SIZE(_parents), \
^~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
include/linux/kernel.h:72:25: note: (near initialization for 'top_muxes[3].mux_width')
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
^
drivers/clk/mediatek/clk-mtk.h:123:18: note: in expansion of macro 'ARRAY_SIZE'
.num_parents = ARRAY_SIZE(_parents), \
^~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
In file included from drivers/clk/mediatek/clk-mt6797.c:20:0:
drivers/clk/mediatek/clk-mtk.h:124:3: error: field name not in record or union initializer
.flags = CLK_SET_RATE_PARENT, \
^
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
drivers/clk/mediatek/clk-mtk.h:124:3: note: (near initialization for 'top_muxes[3].mux_width')
.flags = CLK_SET_RATE_PARENT, \
^
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
In file included from include/linux/bitops.h:5:0,
from include/linux/of.h:15,
from drivers/clk/mediatek/clk-mt6797.c:15:
include/linux/bits.h:6:19: warning: excess elements in scalar initializer
#define BIT(nr) (1UL << (nr))
^
include/linux/clk-provider.h:24:29: note: in expansion of macro 'BIT'
#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
^~~
drivers/clk/mediatek/clk-mtk.h:124:12: note: in expansion of macro 'CLK_SET_RATE_PARENT'
.flags = CLK_SET_RATE_PARENT, \
^~~~~~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
include/linux/bits.h:6:19: note: (near initialization for 'top_muxes[3].mux_width')
#define BIT(nr) (1UL << (nr))
^
include/linux/clk-provider.h:24:29: note: in expansion of macro 'BIT'
#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
^~~
drivers/clk/mediatek/clk-mtk.h:124:12: note: in expansion of macro 'CLK_SET_RATE_PARENT'
.flags = CLK_SET_RATE_PARENT, \
^~~~~~~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
In file included from drivers/clk/mediatek/clk-mt6797.c:20:0:
>> drivers/clk/mediatek/clk-mtk.h:114:57: warning: missing braces around initializer [-Wmissing-braces]
#define MUX(_id, _name, _parents, _reg, _shift, _width) { \
^
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
drivers/clk/mediatek/clk-mtk.h:114:57: note: (near initialization for 'top_muxes[3].mux_width')
#define MUX(_id, _name, _parents, _reg, _shift, _width) { \
^
drivers/clk/mediatek/clk-mt6797.c:345:2: note: in expansion of macro 'MUX'
MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
^~~
drivers/clk/mediatek/clk-mt6797.c:347:2: warning: braces around scalar initializer
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:347:2: note: (near initialization for 'top_muxes[3].gate_shift')
In file included from drivers/clk/mediatek/clk-mt6797.c:20:0:
drivers/clk/mediatek/clk-mtk.h:93:3: error: field name not in record or union initializer
.id = _id, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:347:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:93:3: note: (near initialization for 'top_muxes[3].gate_shift')
.id = _id, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:347:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:94:3: error: field name not in record or union initializer
.name = _name, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:347:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:94:3: note: (near initialization for 'top_muxes[3].gate_shift')
.name = _name, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:347:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:347:30: warning: excess elements in scalar initializer
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^
drivers/clk/mediatek/clk-mtk.h:94:11: note: in definition of macro 'MUX_GATE_FLAGS'
.name = _name, \
^~~~~
drivers/clk/mediatek/clk-mt6797.c:347:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:347:30: note: (near initialization for 'top_muxes[3].gate_shift')
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^
drivers/clk/mediatek/clk-mtk.h:94:11: note: in definition of macro 'MUX_GATE_FLAGS'
.name = _name, \
^~~~~
drivers/clk/mediatek/clk-mt6797.c:347:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:95:3: error: field name not in record or union initializer
.mux_reg = _reg, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:347:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mtk.h:95:3: note: (near initialization for 'top_muxes[3].gate_shift')
.mux_reg = _reg, \
^
drivers/clk/mediatek/clk-mtk.h:111:2: note: in expansion of macro 'MUX_GATE_FLAGS'
MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
^~~~~~~~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:347:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:348:4: warning: excess elements in scalar initializer
0x0060, 24, 2, 31),
^
drivers/clk/mediatek/clk-mtk.h:95:14: note: in definition of macro 'MUX_GATE_FLAGS'
.mux_reg = _reg, \
^~~~
drivers/clk/mediatek/clk-mt6797.c:347:2: note: in expansion of macro 'MUX_GATE'
MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
^~~~~~~~
drivers/clk/mediatek/clk-mt6797.c:348:4: note: (near initialization for 'top_muxes[3].gate_shift')
0x0060, 24, 2, 31),
^
..
vim +/flags +446 drivers/clk/mediatek/clk-mt6797.c
326
327 static const struct mtk_composite top_muxes[] = {
328 MUX(CLK_TOP_MUX_ULPOSC_AXI_CK_MUX_PRE, "ulposc_axi_ck_mux_pre",
329 ulposc_axi_ck_mux_pre_parents, 0x0040, 3, 1),
330 MUX(CLK_TOP_MUX_ULPOSC_AXI_CK_MUX, "ulposc_axi_ck_mux",
331 ulposc_axi_ck_mux_parents, 0x0040, 2, 1),
332 MUX(CLK_TOP_MUX_AXI, "axi_sel", axi_parents,
333 0x0040, 0, 2),
334 MUX_FLAGS(CLK_TOP_MUX_DDRPHYCFG, "ddrphycfg_sel", ddrphycfg_parents,
335 0x0040, 16, 2, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
336 MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
337 0x0040, 24, 2),
338 MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),
339 MUX_GATE(CLK_TOP_MUX_VDEC, "vdec_sel", vdec_parents, 0x0050, 8, 3, 15),
340 MUX_GATE(CLK_TOP_MUX_VENC, "venc_sel", venc_parents, 0x0050, 16, 2, 23),
341 MUX_GATE(CLK_TOP_MUX_MFG, "mfg_sel", mfg_parents, 0x0050, 24, 2, 31),
342 MUX_GATE(CLK_TOP_MUX_CAMTG, "camtg_sel", camtg, 0x0060, 0, 2, 7),
343 MUX_GATE(CLK_TOP_MUX_UART, "uart_sel", uart_parents, 0x0060, 8, 1, 15),
344 MUX_GATE(CLK_TOP_MUX_SPI, "spi_sel", spi_parents, 0x0060, 16, 2, 23),
345 MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
346 ulposc_spi_ck_mux_parents, 0x0060, 18, 1),
347 MUX_GATE(CLK_TOP_MUX_USB20, "usb20_sel", usb20_parents,
348 0x0060, 24, 2, 31),
349 MUX(CLK_TOP_MUX_MSDC50_0_HCLK, "msdc50_0_hclk_sel",
350 msdc50_0_hclk_parents, 0x0070, 8, 2),
351 MUX_GATE(CLK_TOP_MUX_MSDC50_0, "msdc50_0_sel", msdc50_0_parents,
352 0x0070, 16, 4, 23),
353 MUX_GATE(CLK_TOP_MUX_MSDC30_1, "msdc30_1_sel", msdc30_1_parents,
354 0x0070, 24, 3, 31),
355 MUX_GATE(CLK_TOP_MUX_MSDC30_2, "msdc30_2_sel", msdc30_2_parents,
356 0x0080, 0, 3, 7),
357 MUX_GATE(CLK_TOP_MUX_AUDIO, "audio_sel", audio_parents,
358 0x0080, 16, 2, 23),
359 MUX(CLK_TOP_MUX_AUD_INTBUS, "aud_intbus_sel", aud_intbus_parents,
360 0x0080, 24, 2),
361 MUX(CLK_TOP_MUX_PMICSPI, "pmicspi_sel", pmicspi_parents,
362 0x0090, 0, 3),
363 MUX(CLK_TOP_MUX_SCP, "scp_sel", scp_parents,
364 0x0090, 8, 2),
365 MUX(CLK_TOP_MUX_ATB, "atb_sel", atb_parents,
366 0x0090, 16, 2),
367 MUX_GATE(CLK_TOP_MUX_MJC, "mjc_sel", mjc_parents, 0x0090, 24, 2, 31),
368 MUX_GATE(CLK_TOP_MUX_DPI0, "dpi0_sel", dpi0_parents, 0x00A0, 0, 3, 7),
369 MUX_GATE(CLK_TOP_MUX_AUD_1, "aud_1_sel", aud_1_parents,
370 0x00A0, 16, 1, 23),
371 MUX_GATE(CLK_TOP_MUX_AUD_2, "aud_2_sel", aud_2_parents,
372 0x00A0, 24, 1, 31),
373 MUX(CLK_TOP_MUX_SSUSB_TOP_SYS, "ssusb_top_sys_sel",
374 ssusb_top_sys_parents, 0x00B0, 8, 1),
375 MUX(CLK_TOP_MUX_SPM, "spm_sel", spm_parents,
376 0x00C0, 0, 1),
377 MUX(CLK_TOP_MUX_BSI_SPI, "bsi_spi_sel", bsi_spi_parents,
378 0x00C0, 8, 2),
379 MUX_GATE(CLK_TOP_MUX_AUDIO_H, "audio_h_sel", audio_h_parents,
380 0x00C0, 16, 2, 23),
381 MUX_GATE(CLK_TOP_MUX_ANC_MD32, "anc_md32_sel", anc_md32_parents,
382 0x00C0, 24, 2, 31),
> 383 MUX(CLK_TOP_MUX_MFG_52M, "mfg_52m_sel", mfg_52m_parents,
384 0x0104, 1, 2),
385 };
386
387 static int mtk_topckgen_init(struct platform_device *pdev)
388 {
389 struct clk_onecell_data *clk_data;
390 void __iomem *base;
391 struct device_node *node = pdev->dev.of_node;
392 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
393
394 base = devm_ioremap_resource(&pdev->dev, res);
395 if (IS_ERR(base))
396 return PTR_ERR(base);
397
398 clk_data = mtk_alloc_clk_data(CLK_TOP_NR);
399
400 mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs),
401 clk_data);
402
403 mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
404 &mt6797_clk_lock, clk_data);
405
406 return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
407 }
408
409 static const struct mtk_gate_regs infra0_cg_regs = {
410 .set_ofs = 0x0080,
411 .clr_ofs = 0x0084,
412 .sta_ofs = 0x0090,
413 };
414
415 static const struct mtk_gate_regs infra1_cg_regs = {
416 .set_ofs = 0x0088,
417 .clr_ofs = 0x008c,
418 .sta_ofs = 0x0094,
419 };
420
421 static const struct mtk_gate_regs infra2_cg_regs = {
422 .set_ofs = 0x00a8,
423 .clr_ofs = 0x00ac,
424 .sta_ofs = 0x00b0,
425 };
426
427 #define GATE_ICG0(_id, _name, _parent, _shift) { \
428 .id = _id, \
429 .name = _name, \
430 .parent_name = _parent, \
431 .regs = &infra0_cg_regs, \
432 .shift = _shift, \
433 .ops = &mtk_clk_gate_ops_setclr, \
434 }
435
436 #define GATE_ICG1(_id, _name, _parent, _shift) \
437 GATE_ICG1_FLAGS(_id, _name, _parent, _shift, 0)
438
439 #define GATE_ICG1_FLAGS(_id, _name, _parent, _shift, _flags) { \
440 .id = _id, \
441 .name = _name, \
442 .parent_name = _parent, \
443 .regs = &infra1_cg_regs, \
444 .shift = _shift, \
445 .ops = &mtk_clk_gate_ops_setclr, \
> 446 .flags = _flags, \
447 }
448
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/drivers/clk/mediatek/clk-mt6797.c b/drivers/clk/mediatek/clk-mt6797.c index 5702bc974ed9..a6e5408e0388 100644 --- a/drivers/clk/mediatek/clk-mt6797.c +++ b/drivers/clk/mediatek/clk-mt6797.c @@ -331,8 +331,8 @@ static const struct mtk_composite top_muxes[] = { ulposc_axi_ck_mux_parents, 0x0040, 2, 1), MUX(CLK_TOP_MUX_AXI, "axi_sel", axi_parents, 0x0040, 0, 2), - MUX(CLK_TOP_MUX_DDRPHYCFG, "ddrphycfg_sel", ddrphycfg_parents, - 0x0040, 16, 2), + MUX_FLAGS(CLK_TOP_MUX_DDRPHYCFG, "ddrphycfg_sel", ddrphycfg_parents, + 0x0040, 16, 2, CLK_IS_CRITICAL | CLK_SET_RATE_PARENT), MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents, 0x0040, 24, 2), MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7), @@ -424,31 +424,39 @@ static const struct mtk_gate_regs infra2_cg_regs = { .sta_ofs = 0x00b0, }; -#define GATE_ICG0(_id, _name, _parent, _shift) { \ - .id = _id, \ - .name = _name, \ - .parent_name = _parent, \ - .regs = &infra0_cg_regs, \ - .shift = _shift, \ - .ops = &mtk_clk_gate_ops_setclr, \ +#define GATE_ICG0(_id, _name, _parent, _shift) { \ + .id = _id, \ + .name = _name, \ + .parent_name = _parent, \ + .regs = &infra0_cg_regs, \ + .shift = _shift, \ + .ops = &mtk_clk_gate_ops_setclr, \ } -#define GATE_ICG1(_id, _name, _parent, _shift) { \ - .id = _id, \ - .name = _name, \ - .parent_name = _parent, \ - .regs = &infra1_cg_regs, \ - .shift = _shift, \ - .ops = &mtk_clk_gate_ops_setclr, \ +#define GATE_ICG1(_id, _name, _parent, _shift) \ + GATE_ICG1_FLAGS(_id, _name, _parent, _shift, 0) + +#define GATE_ICG1_FLAGS(_id, _name, _parent, _shift, _flags) { \ + .id = _id, \ + .name = _name, \ + .parent_name = _parent, \ + .regs = &infra1_cg_regs, \ + .shift = _shift, \ + .ops = &mtk_clk_gate_ops_setclr, \ + .flags = _flags, \ } -#define GATE_ICG2(_id, _name, _parent, _shift) { \ - .id = _id, \ - .name = _name, \ - .parent_name = _parent, \ - .regs = &infra2_cg_regs, \ - .shift = _shift, \ - .ops = &mtk_clk_gate_ops_setclr, \ +#define GATE_ICG2(_id, _name, _parent, _shift) \ + GATE_ICG2_FLAGS(_id, _name, _parent, _shift, 0) + +#define GATE_ICG2_FLAGS(_id, _name, _parent, _shift, _flags) { \ + .id = _id, \ + .name = _name, \ + .parent_name = _parent, \ + .regs = &infra2_cg_regs, \ + .shift = _shift, \ + .ops = &mtk_clk_gate_ops_setclr, \ + .flags = _flags, \ } static const struct mtk_gate infra_clks[] = { @@ -505,7 +513,8 @@ static const struct mtk_gate infra_clks[] = { GATE_ICG1(CLK_INFRA_CCIF_AP, "infra_ccif_ap", "axi_sel", 23), GATE_ICG1(CLK_INFRA_AUDIO, "infra_audio", "axi_sel", 25), GATE_ICG1(CLK_INFRA_CCIF_MD, "infra_ccif_md", "axi_sel", 26), - GATE_ICG1(CLK_INFRA_DRAMC_F26M, "infra_dramc_f26m", "clk26m", 31), + GATE_ICG1_FLAGS(CLK_INFRA_DRAMC_F26M, "infra_dramc_f26m", + "clk26m", 31, CLK_IS_CRITICAL), GATE_ICG2(CLK_INFRA_I2C4, "infra_i2c4", "axi_sel", 0), GATE_ICG2(CLK_INFRA_I2C_APPM, "infra_i2c_appm", "axi_sel", 1), GATE_ICG2(CLK_INFRA_I2C_GPUPM, "infra_i2c_gpupm", "axi_sel", 2), @@ -516,7 +525,8 @@ static const struct mtk_gate infra_clks[] = { GATE_ICG2(CLK_INFRA_I2C5, "infra_i2c5", "axi_sel", 7), GATE_ICG2(CLK_INFRA_SYS_CIRQ, "infra_sys_cirq", "axi_sel", 8), GATE_ICG2(CLK_INFRA_SPI1, "infra_spi1", "spi_sel", 10), - GATE_ICG2(CLK_INFRA_DRAMC_B_F26M, "infra_dramc_b_f26m", "clk26m", 11), + GATE_ICG2_FLAGS(CLK_INFRA_DRAMC_B_F26M, "infra_dramc_b_f26m", + "clk26m", 11, CLK_IS_CRITICAL), GATE_ICG2(CLK_INFRA_ANC_MD32, "infra_anc_md32", "anc_md32_sel", 12), GATE_ICG2(CLK_INFRA_ANC_MD32_32K, "infra_anc_md32_32k", "clk26m", 13), GATE_ICG2(CLK_INFRA_DVFS_SPM1, "infra_dvfs_spm1", "axi_sel", 15),