| Message ID | 088ecb1e526e3ccfd58dd3f7cae8a98edd23008c.1546185298.git.stefan@agner.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: trivial assembly fixes to enable LLVM as | expand |
Hi Stefan,
I love your patch! Yet something to improve:
[auto build test ERROR on arm/for-next]
[also build test ERROR on v4.20 next-20181224]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Stefan-Agner/ARM-fix-argument-count-to-match-macro-definition/20181231-001137
base: git://git.armlinux.org.uk/~rmk/linux-arm.git for-next
config: arm-oxnas_v6_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=arm
All errors (new ones prefixed by >>):
/tmp/ccy8cyiv.s: Assembler messages:
>> /tmp/ccy8cyiv.s:424: Error: bad instruction `rsbspl r3,r2,#0'
>> /tmp/ccy8cyiv.s:469: Error: bad instruction `rsbspl r2,r1,#0'
/tmp/ccy8cyiv.s:512: Error: bad instruction `rsbspl r3,r2,#0'
/tmp/ccy8cyiv.s:791: Error: bad instruction `rsbspl r3,r2,#0'
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
Hi Stefan,
I love your patch! Yet something to improve:
[auto build test ERROR on arm/for-next]
[also build test ERROR on v4.20 next-20181224]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Stefan-Agner/ARM-fix-argument-count-to-match-macro-definition/20181231-001137
base: git://git.armlinux.org.uk/~rmk/linux-arm.git for-next
config: arm-tango4_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=arm
All errors (new ones prefixed by >>):
/tmp/cc9eoIEp.s: Assembler messages:
/tmp/cc9eoIEp.s:247: Error: bad instruction `rsbspl r3,r2,#0'
/tmp/cc9eoIEp.s:351: Error: bad instruction `rsbspl r3,r2,#0'
>> /tmp/cc9eoIEp.s:463: Error: bad instruction `rsbspl r3,r1,#0'
/tmp/cc9eoIEp.s:659: Error: bad instruction `rsbspl r3,r2,#0'
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/arch/arm/include/asm/spinlock.h b/arch/arm/include/asm/spinlock.h index 099c78fcf62d..563ecedf2a1f 100644 --- a/arch/arm/include/asm/spinlock.h +++ b/arch/arm/include/asm/spinlock.h @@ -214,7 +214,7 @@ static inline void arch_read_lock(arch_rwlock_t *rw) " adds %0, %0, #1\n" " strexpl %1, %0, [%2]\n" WFE("mi") -" rsbpls %0, %1, #0\n" +" rsbspl %0, %1, #0\n" " bmi 1b" : "=&r" (tmp), "=&r" (tmp2) : "r" (&rw->lock)
Convert the conditional infix to a postfix to make sure this inline assembly is unified syntax. Signed-off-by: Stefan Agner <stefan@agner.ch> --- arch/arm/include/asm/spinlock.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)