| Message ID | 20190131133928.17985-6-brgl@bgdev.pl (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: davinci: modernize the irq support | expand |
On 1/31/19 7:38 AM, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bgolaszewski@baylibre.com> > > In order to select SPARSE_IRQ we need to make the interrupt numbers > dynamic (at least at build-time for the top-level controller). The > interrupt numbers are used as array indexes for irq priorities. > > Drop the defines and just initialize the arrays in a linear manner. > > Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> > --- ... > -static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = { > - [IRQ_DM355_CCDC_VDINT0] = 2, > - [IRQ_DM355_CCDC_VDINT1] = 6, > - [IRQ_DM355_CCDC_VDINT2] = 6, > - [IRQ_DM355_IPIPE_HST] = 6, > - [IRQ_DM355_H3AINT] = 6, > - [IRQ_DM355_IPIPE_SDR] = 6, > - [IRQ_DM355_IPIPEIFINT] = 6, > - [IRQ_DM355_OSDINT] = 7, > - [IRQ_DM355_VENCINT] = 6, > - [IRQ_ASQINT] = 6, > - [IRQ_IMXINT] = 6, > - [IRQ_USBINT] = 4, > - [IRQ_DM355_RTOINT] = 4, > - [IRQ_DM355_UARTINT2] = 7, > - [IRQ_DM355_TINT6] = 7, > - [IRQ_CCINT0] = 5, /* dma */ > - [IRQ_CCERRINT] = 5, /* dma */ > - [IRQ_TCERRINT0] = 5, /* dma */ > - [IRQ_TCERRINT] = 5, /* dma */ > - [IRQ_DM355_SPINT2_1] = 7, > - [IRQ_DM355_TINT7] = 4, > - [IRQ_DM355_SDIOINT0] = 7, > - [IRQ_MBXINT] = 7, > - [IRQ_MBRINT] = 7, > - [IRQ_MMCINT] = 7, > - [IRQ_DM355_MMCINT1] = 7, > - [IRQ_DM355_PWMINT3] = 7, > - [IRQ_DDRINT] = 7, > - [IRQ_AEMIFINT] = 7, > - [IRQ_DM355_SDIOINT1] = 4, > - [IRQ_TINT0_TINT12] = 2, /* clockevent */ > - [IRQ_TINT0_TINT34] = 2, /* clocksource */ > - [IRQ_TINT1_TINT12] = 7, /* DSP timer */ > - [IRQ_TINT1_TINT34] = 7, /* system tick */ > - [IRQ_PWMINT0] = 7, > - [IRQ_PWMINT1] = 7, > - [IRQ_PWMINT2] = 7, > - [IRQ_I2C] = 3, > - [IRQ_UARTINT0] = 3, > - [IRQ_UARTINT1] = 3, > - [IRQ_DM355_SPINT0_0] = 3, > - [IRQ_DM355_SPINT0_1] = 3, > - [IRQ_DM355_GPIO0] = 3, > - [IRQ_DM355_GPIO1] = 7, > - [IRQ_DM355_GPIO2] = 4, > - [IRQ_DM355_GPIO3] = 4, > - [IRQ_DM355_GPIO4] = 7, > - [IRQ_DM355_GPIO5] = 7, > - [IRQ_DM355_GPIO6] = 7, > - [IRQ_DM355_GPIO7] = 7, > - [IRQ_DM355_GPIO8] = 7, > - [IRQ_DM355_GPIO9] = 7, > - [IRQ_DM355_GPIOBNK0] = 7, > - [IRQ_DM355_GPIOBNK1] = 7, > - [IRQ_DM355_GPIOBNK2] = 7, > - [IRQ_DM355_GPIOBNK3] = 7, > - [IRQ_DM355_GPIOBNK4] = 7, > - [IRQ_DM355_GPIOBNK5] = 7, > - [IRQ_DM355_GPIOBNK6] = 7, > - [IRQ_COMMTX] = 7, > - [IRQ_COMMRX] = 7, > - [IRQ_EMUINT] = 7, > +static u8 dm355_aintc_prios[] = { > + 2, 6, 6, 6, 6, 6, 6, 7, > + 6, 6, 6, 4, 4, 7, 7, 5, > + 5, 5, 5, 7, 4, 7, 7, 7, > + 7, 7, 7, 7, 7, 4, 2, 2, > + 7, 7, 7, 7, 7, 3, 3, 3, > + 3, 3, 3, 7, 4, 4, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 0, 0, > }; Hmm... this makes it harder to see what is going on here. You can no longer see which priority corresponds to which IRQ without consulting a manual.
On 1/31/19 7:38 AM, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bgolaszewski@baylibre.com> > > In order to select SPARSE_IRQ we need to make the interrupt numbers > dynamic (at least at build-time for the top-level controller). The > interrupt numbers are used as array indexes for irq priorities. > > Drop the defines and just initialize the arrays in a linear manner. > > Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> > --- > arch/arm/mach-davinci/da830.c | 107 ++++-------------------------- > arch/arm/mach-davinci/da850.c | 118 +++++---------------------------- > arch/arm/mach-davinci/dm355.c | 74 +++------------------ > arch/arm/mach-davinci/dm365.c | 76 +++------------------ > arch/arm/mach-davinci/dm644x.c | 76 +++------------------ > arch/arm/mach-davinci/dm646x.c | 76 +++------------------ > 6 files changed, 69 insertions(+), 458 deletions(-) > > diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c > index 9e18b245266b..f1e7b6c644e5 100644 > --- a/arch/arm/mach-davinci/da830.c > +++ b/arch/arm/mach-davinci/da830.c > @@ -624,98 +624,19 @@ const short da830_eqep1_pins[] __initconst = { > }; > > /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ > -static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = { > - [IRQ_DA8XX_COMMTX] = 7, > - [IRQ_DA8XX_COMMRX] = 7, > - [IRQ_DA8XX_NINT] = 7, > - [IRQ_DA8XX_EVTOUT0] = 7, > - [IRQ_DA8XX_EVTOUT1] = 7, > - [IRQ_DA8XX_EVTOUT2] = 7, > - [IRQ_DA8XX_EVTOUT3] = 7, > - [IRQ_DA8XX_EVTOUT4] = 7, > - [IRQ_DA8XX_EVTOUT5] = 7, > - [IRQ_DA8XX_EVTOUT6] = 7, > - [IRQ_DA8XX_EVTOUT7] = 7, > - [IRQ_DA8XX_CCINT0] = 7, > - [IRQ_DA8XX_CCERRINT] = 7, > - [IRQ_DA8XX_TCERRINT0] = 7, > - [IRQ_DA8XX_AEMIFINT] = 7, > - [IRQ_DA8XX_I2CINT0] = 7, > - [IRQ_DA8XX_MMCSDINT0] = 7, > - [IRQ_DA8XX_MMCSDINT1] = 7, > - [IRQ_DA8XX_ALLINT0] = 7, > - [IRQ_DA8XX_RTC] = 7, > - [IRQ_DA8XX_SPINT0] = 7, > - [IRQ_DA8XX_TINT12_0] = 7, > - [IRQ_DA8XX_TINT34_0] = 7, > - [IRQ_DA8XX_TINT12_1] = 7, > - [IRQ_DA8XX_TINT34_1] = 7, > - [IRQ_DA8XX_UARTINT0] = 7, > - [IRQ_DA8XX_KEYMGRINT] = 7, > - [IRQ_DA830_MPUERR] = 7, > - [IRQ_DA8XX_CHIPINT0] = 7, > - [IRQ_DA8XX_CHIPINT1] = 7, > - [IRQ_DA8XX_CHIPINT2] = 7, > - [IRQ_DA8XX_CHIPINT3] = 7, > - [IRQ_DA8XX_TCERRINT1] = 7, > - [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7, > - [IRQ_DA8XX_C0_RX_PULSE] = 7, > - [IRQ_DA8XX_C0_TX_PULSE] = 7, > - [IRQ_DA8XX_C0_MISC_PULSE] = 7, > - [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7, > - [IRQ_DA8XX_C1_RX_PULSE] = 7, > - [IRQ_DA8XX_C1_TX_PULSE] = 7, > - [IRQ_DA8XX_C1_MISC_PULSE] = 7, > - [IRQ_DA8XX_MEMERR] = 7, > - [IRQ_DA8XX_GPIO0] = 7, > - [IRQ_DA8XX_GPIO1] = 7, > - [IRQ_DA8XX_GPIO2] = 7, > - [IRQ_DA8XX_GPIO3] = 7, > - [IRQ_DA8XX_GPIO4] = 7, > - [IRQ_DA8XX_GPIO5] = 7, > - [IRQ_DA8XX_GPIO6] = 7, > - [IRQ_DA8XX_GPIO7] = 7, > - [IRQ_DA8XX_GPIO8] = 7, > - [IRQ_DA8XX_I2CINT1] = 7, > - [IRQ_DA8XX_LCDINT] = 7, > - [IRQ_DA8XX_UARTINT1] = 7, > - [IRQ_DA8XX_MCASPINT] = 7, > - [IRQ_DA8XX_ALLINT1] = 7, > - [IRQ_DA8XX_SPINT1] = 7, > - [IRQ_DA8XX_UHPI_INT1] = 7, > - [IRQ_DA8XX_USB_INT] = 7, > - [IRQ_DA8XX_IRQN] = 7, > - [IRQ_DA8XX_RWAKEUP] = 7, > - [IRQ_DA8XX_UARTINT2] = 7, > - [IRQ_DA8XX_DFTSSINT] = 7, > - [IRQ_DA8XX_EHRPWM0] = 7, > - [IRQ_DA8XX_EHRPWM0TZ] = 7, > - [IRQ_DA8XX_EHRPWM1] = 7, > - [IRQ_DA8XX_EHRPWM1TZ] = 7, > - [IRQ_DA830_EHRPWM2] = 7, > - [IRQ_DA830_EHRPWM2TZ] = 7, > - [IRQ_DA8XX_ECAP0] = 7, > - [IRQ_DA8XX_ECAP1] = 7, > - [IRQ_DA8XX_ECAP2] = 7, > - [IRQ_DA830_EQEP0] = 7, > - [IRQ_DA830_EQEP1] = 7, > - [IRQ_DA830_T12CMPINT0_0] = 7, > - [IRQ_DA830_T12CMPINT1_0] = 7, > - [IRQ_DA830_T12CMPINT2_0] = 7, > - [IRQ_DA830_T12CMPINT3_0] = 7, > - [IRQ_DA830_T12CMPINT4_0] = 7, > - [IRQ_DA830_T12CMPINT5_0] = 7, > - [IRQ_DA830_T12CMPINT6_0] = 7, > - [IRQ_DA830_T12CMPINT7_0] = 7, > - [IRQ_DA830_T12CMPINT0_1] = 7, > - [IRQ_DA830_T12CMPINT1_1] = 7, > - [IRQ_DA830_T12CMPINT2_1] = 7, > - [IRQ_DA830_T12CMPINT3_1] = 7, > - [IRQ_DA830_T12CMPINT4_1] = 7, > - [IRQ_DA830_T12CMPINT5_1] = 7, > - [IRQ_DA830_T12CMPINT6_1] = 7, > - [IRQ_DA830_T12CMPINT7_1] = 7, > - [IRQ_DA8XX_ARMCLKSTOPREQ] = 7, > +static u8 da830_cp_intc_prios[] = { > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > + 7, 7, 7, 7, 7, 7, 7, 7, > }; > Technically, any holes in the array that are being deleted here have a default priority of 15 assigned in the cp_intc driver instead of 7. I don't think this is a problem, but it might be worth mentioning in the commit message. Same goes for DA850.
wt., 5 lut 2019 o 01:20 David Lechner <david@lechnology.com> napisał(a): > > On 1/31/19 7:38 AM, Bartosz Golaszewski wrote: > > From: Bartosz Golaszewski <bgolaszewski@baylibre.com> > > > > In order to select SPARSE_IRQ we need to make the interrupt numbers > > dynamic (at least at build-time for the top-level controller). The > > interrupt numbers are used as array indexes for irq priorities. > > > > Drop the defines and just initialize the arrays in a linear manner. > > > > Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> > > --- [snip!] > > > > Technically, any holes in the array that are being deleted > here have a default priority of 15 assigned in the cp_intc > driver instead of 7. I don't think this is a problem, but it > might be worth mentioning in the commit message. Same goes > for DA850. > Actually the defaulting is only done if no priorities have been defined at all. I'll double check though if there are no holes here. Bart
On 05/02/19 3:51 AM, David Lechner wrote: > On 1/31/19 7:38 AM, Bartosz Golaszewski wrote: >> From: Bartosz Golaszewski <bgolaszewski@baylibre.com> >> >> In order to select SPARSE_IRQ we need to make the interrupt numbers >> dynamic (at least at build-time for the top-level controller). The >> interrupt numbers are used as array indexes for irq priorities. >> >> Drop the defines and just initialize the arrays in a linear manner. >> >> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> >> --- > > ... > >> -static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = { >> - [IRQ_DM355_CCDC_VDINT0] = 2, >> - [IRQ_DM355_CCDC_VDINT1] = 6, >> - [IRQ_DM355_CCDC_VDINT2] = 6, >> - [IRQ_DM355_IPIPE_HST] = 6, >> - [IRQ_DM355_H3AINT] = 6, >> - [IRQ_DM355_IPIPE_SDR] = 6, >> - [IRQ_DM355_IPIPEIFINT] = 6, >> - [IRQ_DM355_OSDINT] = 7, >> - [IRQ_DM355_VENCINT] = 6, >> - [IRQ_ASQINT] = 6, >> - [IRQ_IMXINT] = 6, >> - [IRQ_USBINT] = 4, >> - [IRQ_DM355_RTOINT] = 4, >> - [IRQ_DM355_UARTINT2] = 7, >> - [IRQ_DM355_TINT6] = 7, >> - [IRQ_CCINT0] = 5, /* dma */ >> - [IRQ_CCERRINT] = 5, /* dma */ >> - [IRQ_TCERRINT0] = 5, /* dma */ >> - [IRQ_TCERRINT] = 5, /* dma */ >> - [IRQ_DM355_SPINT2_1] = 7, >> - [IRQ_DM355_TINT7] = 4, >> - [IRQ_DM355_SDIOINT0] = 7, >> - [IRQ_MBXINT] = 7, >> - [IRQ_MBRINT] = 7, >> - [IRQ_MMCINT] = 7, >> - [IRQ_DM355_MMCINT1] = 7, >> - [IRQ_DM355_PWMINT3] = 7, >> - [IRQ_DDRINT] = 7, >> - [IRQ_AEMIFINT] = 7, >> - [IRQ_DM355_SDIOINT1] = 4, >> - [IRQ_TINT0_TINT12] = 2, /* clockevent */ >> - [IRQ_TINT0_TINT34] = 2, /* clocksource */ >> - [IRQ_TINT1_TINT12] = 7, /* DSP timer */ >> - [IRQ_TINT1_TINT34] = 7, /* system tick */ >> - [IRQ_PWMINT0] = 7, >> - [IRQ_PWMINT1] = 7, >> - [IRQ_PWMINT2] = 7, >> - [IRQ_I2C] = 3, >> - [IRQ_UARTINT0] = 3, >> - [IRQ_UARTINT1] = 3, >> - [IRQ_DM355_SPINT0_0] = 3, >> - [IRQ_DM355_SPINT0_1] = 3, >> - [IRQ_DM355_GPIO0] = 3, >> - [IRQ_DM355_GPIO1] = 7, >> - [IRQ_DM355_GPIO2] = 4, >> - [IRQ_DM355_GPIO3] = 4, >> - [IRQ_DM355_GPIO4] = 7, >> - [IRQ_DM355_GPIO5] = 7, >> - [IRQ_DM355_GPIO6] = 7, >> - [IRQ_DM355_GPIO7] = 7, >> - [IRQ_DM355_GPIO8] = 7, >> - [IRQ_DM355_GPIO9] = 7, >> - [IRQ_DM355_GPIOBNK0] = 7, >> - [IRQ_DM355_GPIOBNK1] = 7, >> - [IRQ_DM355_GPIOBNK2] = 7, >> - [IRQ_DM355_GPIOBNK3] = 7, >> - [IRQ_DM355_GPIOBNK4] = 7, >> - [IRQ_DM355_GPIOBNK5] = 7, >> - [IRQ_DM355_GPIOBNK6] = 7, >> - [IRQ_COMMTX] = 7, >> - [IRQ_COMMRX] = 7, >> - [IRQ_EMUINT] = 7, >> +static u8 dm355_aintc_prios[] = { >> + 2, 6, 6, 6, 6, 6, 6, 7, >> + 6, 6, 6, 4, 4, 7, 7, 5, >> + 5, 5, 5, 7, 4, 7, 7, 7, >> + 7, 7, 7, 7, 7, 4, 2, 2, >> + 7, 7, 7, 7, 7, 3, 3, 3, >> + 3, 3, 3, 7, 4, 4, 7, 7, >> + 7, 7, 7, 7, 7, 7, 7, 7, >> + 7, 7, 7, 7, 7, 7, 0, 0, >> }; > > Hmm... this makes it harder to see what is going on here. > You can no longer see which priority corresponds to which > IRQ without consulting a manual. I agree with David here. The interrupt numbers are dynamic, but the interrupt number offset from hardware point-of-view is fixed. So can these macros be re-purposed to represent the hardware offset (eventually you would pass them to DAVINCI_INTC_IRQ())? Thanks, Sekhar
śr., 6 lut 2019 o 14:03 Sekhar Nori <nsekhar@ti.com> napisał(a): > > On 05/02/19 3:51 AM, David Lechner wrote: > > On 1/31/19 7:38 AM, Bartosz Golaszewski wrote: > >> From: Bartosz Golaszewski <bgolaszewski@baylibre.com> > >> > >> In order to select SPARSE_IRQ we need to make the interrupt numbers > >> dynamic (at least at build-time for the top-level controller). The > >> interrupt numbers are used as array indexes for irq priorities. > >> > >> Drop the defines and just initialize the arrays in a linear manner. > >> > >> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> > >> --- > > > > ... > > > >> -static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = { > >> - [IRQ_DM355_CCDC_VDINT0] = 2, > >> - [IRQ_DM355_CCDC_VDINT1] = 6, > >> - [IRQ_DM355_CCDC_VDINT2] = 6, > >> - [IRQ_DM355_IPIPE_HST] = 6, > >> - [IRQ_DM355_H3AINT] = 6, > >> - [IRQ_DM355_IPIPE_SDR] = 6, > >> - [IRQ_DM355_IPIPEIFINT] = 6, > >> - [IRQ_DM355_OSDINT] = 7, > >> - [IRQ_DM355_VENCINT] = 6, > >> - [IRQ_ASQINT] = 6, > >> - [IRQ_IMXINT] = 6, > >> - [IRQ_USBINT] = 4, > >> - [IRQ_DM355_RTOINT] = 4, > >> - [IRQ_DM355_UARTINT2] = 7, > >> - [IRQ_DM355_TINT6] = 7, > >> - [IRQ_CCINT0] = 5, /* dma */ > >> - [IRQ_CCERRINT] = 5, /* dma */ > >> - [IRQ_TCERRINT0] = 5, /* dma */ > >> - [IRQ_TCERRINT] = 5, /* dma */ > >> - [IRQ_DM355_SPINT2_1] = 7, > >> - [IRQ_DM355_TINT7] = 4, > >> - [IRQ_DM355_SDIOINT0] = 7, > >> - [IRQ_MBXINT] = 7, > >> - [IRQ_MBRINT] = 7, > >> - [IRQ_MMCINT] = 7, > >> - [IRQ_DM355_MMCINT1] = 7, > >> - [IRQ_DM355_PWMINT3] = 7, > >> - [IRQ_DDRINT] = 7, > >> - [IRQ_AEMIFINT] = 7, > >> - [IRQ_DM355_SDIOINT1] = 4, > >> - [IRQ_TINT0_TINT12] = 2, /* clockevent */ > >> - [IRQ_TINT0_TINT34] = 2, /* clocksource */ > >> - [IRQ_TINT1_TINT12] = 7, /* DSP timer */ > >> - [IRQ_TINT1_TINT34] = 7, /* system tick */ > >> - [IRQ_PWMINT0] = 7, > >> - [IRQ_PWMINT1] = 7, > >> - [IRQ_PWMINT2] = 7, > >> - [IRQ_I2C] = 3, > >> - [IRQ_UARTINT0] = 3, > >> - [IRQ_UARTINT1] = 3, > >> - [IRQ_DM355_SPINT0_0] = 3, > >> - [IRQ_DM355_SPINT0_1] = 3, > >> - [IRQ_DM355_GPIO0] = 3, > >> - [IRQ_DM355_GPIO1] = 7, > >> - [IRQ_DM355_GPIO2] = 4, > >> - [IRQ_DM355_GPIO3] = 4, > >> - [IRQ_DM355_GPIO4] = 7, > >> - [IRQ_DM355_GPIO5] = 7, > >> - [IRQ_DM355_GPIO6] = 7, > >> - [IRQ_DM355_GPIO7] = 7, > >> - [IRQ_DM355_GPIO8] = 7, > >> - [IRQ_DM355_GPIO9] = 7, > >> - [IRQ_DM355_GPIOBNK0] = 7, > >> - [IRQ_DM355_GPIOBNK1] = 7, > >> - [IRQ_DM355_GPIOBNK2] = 7, > >> - [IRQ_DM355_GPIOBNK3] = 7, > >> - [IRQ_DM355_GPIOBNK4] = 7, > >> - [IRQ_DM355_GPIOBNK5] = 7, > >> - [IRQ_DM355_GPIOBNK6] = 7, > >> - [IRQ_COMMTX] = 7, > >> - [IRQ_COMMRX] = 7, > >> - [IRQ_EMUINT] = 7, > >> +static u8 dm355_aintc_prios[] = { > >> + 2, 6, 6, 6, 6, 6, 6, 7, > >> + 6, 6, 6, 4, 4, 7, 7, 5, > >> + 5, 5, 5, 7, 4, 7, 7, 7, > >> + 7, 7, 7, 7, 7, 4, 2, 2, > >> + 7, 7, 7, 7, 7, 3, 3, 3, > >> + 3, 3, 3, 7, 4, 4, 7, 7, > >> + 7, 7, 7, 7, 7, 7, 7, 7, > >> + 7, 7, 7, 7, 7, 7, 0, 0, > >> }; > > > > Hmm... this makes it harder to see what is going on here. > > You can no longer see which priority corresponds to which > > IRQ without consulting a manual. > > I agree with David here. The interrupt numbers are dynamic, but the > interrupt number offset from hardware point-of-view is fixed. So can > these macros be re-purposed to represent the hardware offset (eventually > you would pass them to DAVINCI_INTC_IRQ())? > > Thanks, > Sekhar Should we keep the mach/irqs.h header then? While working on patches for supporting the multi_v5_defconfig build I noticed the mach/* headers tend to cause build problems in certain drivers that use them. Most machines have gotten rid of them. Should we maybe create a local header in mach-davinci/? Bart
On 06/02/19 7:02 PM, Bartosz Golaszewski wrote: > śr., 6 lut 2019 o 14:03 Sekhar Nori <nsekhar@ti.com> napisał(a): >> >> On 05/02/19 3:51 AM, David Lechner wrote: >>> On 1/31/19 7:38 AM, Bartosz Golaszewski wrote: >>>> From: Bartosz Golaszewski <bgolaszewski@baylibre.com> >>>> >>>> In order to select SPARSE_IRQ we need to make the interrupt numbers >>>> dynamic (at least at build-time for the top-level controller). The >>>> interrupt numbers are used as array indexes for irq priorities. >>>> >>>> Drop the defines and just initialize the arrays in a linear manner. >>>> >>>> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> >>>> --- >>> >>> ... >>> >>>> -static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = { >>>> - [IRQ_DM355_CCDC_VDINT0] = 2, >>>> - [IRQ_DM355_CCDC_VDINT1] = 6, >>>> - [IRQ_DM355_CCDC_VDINT2] = 6, >>>> - [IRQ_DM355_IPIPE_HST] = 6, >>>> - [IRQ_DM355_H3AINT] = 6, >>>> - [IRQ_DM355_IPIPE_SDR] = 6, >>>> - [IRQ_DM355_IPIPEIFINT] = 6, >>>> - [IRQ_DM355_OSDINT] = 7, >>>> - [IRQ_DM355_VENCINT] = 6, >>>> - [IRQ_ASQINT] = 6, >>>> - [IRQ_IMXINT] = 6, >>>> - [IRQ_USBINT] = 4, >>>> - [IRQ_DM355_RTOINT] = 4, >>>> - [IRQ_DM355_UARTINT2] = 7, >>>> - [IRQ_DM355_TINT6] = 7, >>>> - [IRQ_CCINT0] = 5, /* dma */ >>>> - [IRQ_CCERRINT] = 5, /* dma */ >>>> - [IRQ_TCERRINT0] = 5, /* dma */ >>>> - [IRQ_TCERRINT] = 5, /* dma */ >>>> - [IRQ_DM355_SPINT2_1] = 7, >>>> - [IRQ_DM355_TINT7] = 4, >>>> - [IRQ_DM355_SDIOINT0] = 7, >>>> - [IRQ_MBXINT] = 7, >>>> - [IRQ_MBRINT] = 7, >>>> - [IRQ_MMCINT] = 7, >>>> - [IRQ_DM355_MMCINT1] = 7, >>>> - [IRQ_DM355_PWMINT3] = 7, >>>> - [IRQ_DDRINT] = 7, >>>> - [IRQ_AEMIFINT] = 7, >>>> - [IRQ_DM355_SDIOINT1] = 4, >>>> - [IRQ_TINT0_TINT12] = 2, /* clockevent */ >>>> - [IRQ_TINT0_TINT34] = 2, /* clocksource */ >>>> - [IRQ_TINT1_TINT12] = 7, /* DSP timer */ >>>> - [IRQ_TINT1_TINT34] = 7, /* system tick */ >>>> - [IRQ_PWMINT0] = 7, >>>> - [IRQ_PWMINT1] = 7, >>>> - [IRQ_PWMINT2] = 7, >>>> - [IRQ_I2C] = 3, >>>> - [IRQ_UARTINT0] = 3, >>>> - [IRQ_UARTINT1] = 3, >>>> - [IRQ_DM355_SPINT0_0] = 3, >>>> - [IRQ_DM355_SPINT0_1] = 3, >>>> - [IRQ_DM355_GPIO0] = 3, >>>> - [IRQ_DM355_GPIO1] = 7, >>>> - [IRQ_DM355_GPIO2] = 4, >>>> - [IRQ_DM355_GPIO3] = 4, >>>> - [IRQ_DM355_GPIO4] = 7, >>>> - [IRQ_DM355_GPIO5] = 7, >>>> - [IRQ_DM355_GPIO6] = 7, >>>> - [IRQ_DM355_GPIO7] = 7, >>>> - [IRQ_DM355_GPIO8] = 7, >>>> - [IRQ_DM355_GPIO9] = 7, >>>> - [IRQ_DM355_GPIOBNK0] = 7, >>>> - [IRQ_DM355_GPIOBNK1] = 7, >>>> - [IRQ_DM355_GPIOBNK2] = 7, >>>> - [IRQ_DM355_GPIOBNK3] = 7, >>>> - [IRQ_DM355_GPIOBNK4] = 7, >>>> - [IRQ_DM355_GPIOBNK5] = 7, >>>> - [IRQ_DM355_GPIOBNK6] = 7, >>>> - [IRQ_COMMTX] = 7, >>>> - [IRQ_COMMRX] = 7, >>>> - [IRQ_EMUINT] = 7, >>>> +static u8 dm355_aintc_prios[] = { >>>> + 2, 6, 6, 6, 6, 6, 6, 7, >>>> + 6, 6, 6, 4, 4, 7, 7, 5, >>>> + 5, 5, 5, 7, 4, 7, 7, 7, >>>> + 7, 7, 7, 7, 7, 4, 2, 2, >>>> + 7, 7, 7, 7, 7, 3, 3, 3, >>>> + 3, 3, 3, 7, 4, 4, 7, 7, >>>> + 7, 7, 7, 7, 7, 7, 7, 7, >>>> + 7, 7, 7, 7, 7, 7, 0, 0, >>>> }; >>> >>> Hmm... this makes it harder to see what is going on here. >>> You can no longer see which priority corresponds to which >>> IRQ without consulting a manual. >> >> I agree with David here. The interrupt numbers are dynamic, but the >> interrupt number offset from hardware point-of-view is fixed. So can >> these macros be re-purposed to represent the hardware offset (eventually >> you would pass them to DAVINCI_INTC_IRQ())? >> >> Thanks, >> Sekhar > > Should we keep the mach/irqs.h header then? While working on patches > for supporting the multi_v5_defconfig build I noticed the mach/* > headers tend to cause build problems in certain drivers that use them. > Most machines have gotten rid of them. Should we maybe create a local > header in mach-davinci/? Yes, we should have a local header in mach-davinci. It should not be in include/mach/ so it should not be exposed to drivers. Thanks, Sekhar
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 9e18b245266b..f1e7b6c644e5 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -624,98 +624,19 @@ const short da830_eqep1_pins[] __initconst = { }; /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ -static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = { - [IRQ_DA8XX_COMMTX] = 7, - [IRQ_DA8XX_COMMRX] = 7, - [IRQ_DA8XX_NINT] = 7, - [IRQ_DA8XX_EVTOUT0] = 7, - [IRQ_DA8XX_EVTOUT1] = 7, - [IRQ_DA8XX_EVTOUT2] = 7, - [IRQ_DA8XX_EVTOUT3] = 7, - [IRQ_DA8XX_EVTOUT4] = 7, - [IRQ_DA8XX_EVTOUT5] = 7, - [IRQ_DA8XX_EVTOUT6] = 7, - [IRQ_DA8XX_EVTOUT7] = 7, - [IRQ_DA8XX_CCINT0] = 7, - [IRQ_DA8XX_CCERRINT] = 7, - [IRQ_DA8XX_TCERRINT0] = 7, - [IRQ_DA8XX_AEMIFINT] = 7, - [IRQ_DA8XX_I2CINT0] = 7, - [IRQ_DA8XX_MMCSDINT0] = 7, - [IRQ_DA8XX_MMCSDINT1] = 7, - [IRQ_DA8XX_ALLINT0] = 7, - [IRQ_DA8XX_RTC] = 7, - [IRQ_DA8XX_SPINT0] = 7, - [IRQ_DA8XX_TINT12_0] = 7, - [IRQ_DA8XX_TINT34_0] = 7, - [IRQ_DA8XX_TINT12_1] = 7, - [IRQ_DA8XX_TINT34_1] = 7, - [IRQ_DA8XX_UARTINT0] = 7, - [IRQ_DA8XX_KEYMGRINT] = 7, - [IRQ_DA830_MPUERR] = 7, - [IRQ_DA8XX_CHIPINT0] = 7, - [IRQ_DA8XX_CHIPINT1] = 7, - [IRQ_DA8XX_CHIPINT2] = 7, - [IRQ_DA8XX_CHIPINT3] = 7, - [IRQ_DA8XX_TCERRINT1] = 7, - [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7, - [IRQ_DA8XX_C0_RX_PULSE] = 7, - [IRQ_DA8XX_C0_TX_PULSE] = 7, - [IRQ_DA8XX_C0_MISC_PULSE] = 7, - [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7, - [IRQ_DA8XX_C1_RX_PULSE] = 7, - [IRQ_DA8XX_C1_TX_PULSE] = 7, - [IRQ_DA8XX_C1_MISC_PULSE] = 7, - [IRQ_DA8XX_MEMERR] = 7, - [IRQ_DA8XX_GPIO0] = 7, - [IRQ_DA8XX_GPIO1] = 7, - [IRQ_DA8XX_GPIO2] = 7, - [IRQ_DA8XX_GPIO3] = 7, - [IRQ_DA8XX_GPIO4] = 7, - [IRQ_DA8XX_GPIO5] = 7, - [IRQ_DA8XX_GPIO6] = 7, - [IRQ_DA8XX_GPIO7] = 7, - [IRQ_DA8XX_GPIO8] = 7, - [IRQ_DA8XX_I2CINT1] = 7, - [IRQ_DA8XX_LCDINT] = 7, - [IRQ_DA8XX_UARTINT1] = 7, - [IRQ_DA8XX_MCASPINT] = 7, - [IRQ_DA8XX_ALLINT1] = 7, - [IRQ_DA8XX_SPINT1] = 7, - [IRQ_DA8XX_UHPI_INT1] = 7, - [IRQ_DA8XX_USB_INT] = 7, - [IRQ_DA8XX_IRQN] = 7, - [IRQ_DA8XX_RWAKEUP] = 7, - [IRQ_DA8XX_UARTINT2] = 7, - [IRQ_DA8XX_DFTSSINT] = 7, - [IRQ_DA8XX_EHRPWM0] = 7, - [IRQ_DA8XX_EHRPWM0TZ] = 7, - [IRQ_DA8XX_EHRPWM1] = 7, - [IRQ_DA8XX_EHRPWM1TZ] = 7, - [IRQ_DA830_EHRPWM2] = 7, - [IRQ_DA830_EHRPWM2TZ] = 7, - [IRQ_DA8XX_ECAP0] = 7, - [IRQ_DA8XX_ECAP1] = 7, - [IRQ_DA8XX_ECAP2] = 7, - [IRQ_DA830_EQEP0] = 7, - [IRQ_DA830_EQEP1] = 7, - [IRQ_DA830_T12CMPINT0_0] = 7, - [IRQ_DA830_T12CMPINT1_0] = 7, - [IRQ_DA830_T12CMPINT2_0] = 7, - [IRQ_DA830_T12CMPINT3_0] = 7, - [IRQ_DA830_T12CMPINT4_0] = 7, - [IRQ_DA830_T12CMPINT5_0] = 7, - [IRQ_DA830_T12CMPINT6_0] = 7, - [IRQ_DA830_T12CMPINT7_0] = 7, - [IRQ_DA830_T12CMPINT0_1] = 7, - [IRQ_DA830_T12CMPINT1_1] = 7, - [IRQ_DA830_T12CMPINT2_1] = 7, - [IRQ_DA830_T12CMPINT3_1] = 7, - [IRQ_DA830_T12CMPINT4_1] = 7, - [IRQ_DA830_T12CMPINT5_1] = 7, - [IRQ_DA830_T12CMPINT6_1] = 7, - [IRQ_DA830_T12CMPINT7_1] = 7, - [IRQ_DA8XX_ARMCLKSTOPREQ] = 7, +static u8 da830_cp_intc_prios[] = { + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, }; static struct map_desc da830_io_desc[] = { @@ -807,7 +728,7 @@ static const struct davinci_soc_info davinci_soc_info_da830 = { .pinmux_pins = da830_pins, .pinmux_pins_num = ARRAY_SIZE(da830_pins), .intc_base = DA8XX_CP_INTC_BASE, - .intc_irq_prios = da830_default_priorities, + .intc_irq_prios = da830_cp_intc_prios, .intc_irq_num = DA830_N_CP_INTC_IRQ, .timer_info = &da830_timer_info, .emac_pdata = &da8xx_emac_pdata, diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index e823b89e2b7a..40b90730e847 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -299,108 +299,20 @@ const short da850_vpif_display_pins[] __initconst = { }; /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ -static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { - [IRQ_DA8XX_COMMTX] = 7, - [IRQ_DA8XX_COMMRX] = 7, - [IRQ_DA8XX_NINT] = 7, - [IRQ_DA8XX_EVTOUT0] = 7, - [IRQ_DA8XX_EVTOUT1] = 7, - [IRQ_DA8XX_EVTOUT2] = 7, - [IRQ_DA8XX_EVTOUT3] = 7, - [IRQ_DA8XX_EVTOUT4] = 7, - [IRQ_DA8XX_EVTOUT5] = 7, - [IRQ_DA8XX_EVTOUT6] = 7, - [IRQ_DA8XX_EVTOUT7] = 7, - [IRQ_DA8XX_CCINT0] = 7, - [IRQ_DA8XX_CCERRINT] = 7, - [IRQ_DA8XX_TCERRINT0] = 7, - [IRQ_DA8XX_AEMIFINT] = 7, - [IRQ_DA8XX_I2CINT0] = 7, - [IRQ_DA8XX_MMCSDINT0] = 7, - [IRQ_DA8XX_MMCSDINT1] = 7, - [IRQ_DA8XX_ALLINT0] = 7, - [IRQ_DA8XX_RTC] = 7, - [IRQ_DA8XX_SPINT0] = 7, - [IRQ_DA8XX_TINT12_0] = 7, - [IRQ_DA8XX_TINT34_0] = 7, - [IRQ_DA8XX_TINT12_1] = 7, - [IRQ_DA8XX_TINT34_1] = 7, - [IRQ_DA8XX_UARTINT0] = 7, - [IRQ_DA8XX_KEYMGRINT] = 7, - [IRQ_DA850_MPUADDRERR0] = 7, - [IRQ_DA8XX_CHIPINT0] = 7, - [IRQ_DA8XX_CHIPINT1] = 7, - [IRQ_DA8XX_CHIPINT2] = 7, - [IRQ_DA8XX_CHIPINT3] = 7, - [IRQ_DA8XX_TCERRINT1] = 7, - [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7, - [IRQ_DA8XX_C0_RX_PULSE] = 7, - [IRQ_DA8XX_C0_TX_PULSE] = 7, - [IRQ_DA8XX_C0_MISC_PULSE] = 7, - [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7, - [IRQ_DA8XX_C1_RX_PULSE] = 7, - [IRQ_DA8XX_C1_TX_PULSE] = 7, - [IRQ_DA8XX_C1_MISC_PULSE] = 7, - [IRQ_DA8XX_MEMERR] = 7, - [IRQ_DA8XX_GPIO0] = 7, - [IRQ_DA8XX_GPIO1] = 7, - [IRQ_DA8XX_GPIO2] = 7, - [IRQ_DA8XX_GPIO3] = 7, - [IRQ_DA8XX_GPIO4] = 7, - [IRQ_DA8XX_GPIO5] = 7, - [IRQ_DA8XX_GPIO6] = 7, - [IRQ_DA8XX_GPIO7] = 7, - [IRQ_DA8XX_GPIO8] = 7, - [IRQ_DA8XX_I2CINT1] = 7, - [IRQ_DA8XX_LCDINT] = 7, - [IRQ_DA8XX_UARTINT1] = 7, - [IRQ_DA8XX_MCASPINT] = 7, - [IRQ_DA8XX_ALLINT1] = 7, - [IRQ_DA8XX_SPINT1] = 7, - [IRQ_DA8XX_UHPI_INT1] = 7, - [IRQ_DA8XX_USB_INT] = 7, - [IRQ_DA8XX_IRQN] = 7, - [IRQ_DA8XX_RWAKEUP] = 7, - [IRQ_DA8XX_UARTINT2] = 7, - [IRQ_DA8XX_DFTSSINT] = 7, - [IRQ_DA8XX_EHRPWM0] = 7, - [IRQ_DA8XX_EHRPWM0TZ] = 7, - [IRQ_DA8XX_EHRPWM1] = 7, - [IRQ_DA8XX_EHRPWM1TZ] = 7, - [IRQ_DA850_SATAINT] = 7, - [IRQ_DA850_TINTALL_2] = 7, - [IRQ_DA8XX_ECAP0] = 7, - [IRQ_DA8XX_ECAP1] = 7, - [IRQ_DA8XX_ECAP2] = 7, - [IRQ_DA850_MMCSDINT0_1] = 7, - [IRQ_DA850_MMCSDINT1_1] = 7, - [IRQ_DA850_T12CMPINT0_2] = 7, - [IRQ_DA850_T12CMPINT1_2] = 7, - [IRQ_DA850_T12CMPINT2_2] = 7, - [IRQ_DA850_T12CMPINT3_2] = 7, - [IRQ_DA850_T12CMPINT4_2] = 7, - [IRQ_DA850_T12CMPINT5_2] = 7, - [IRQ_DA850_T12CMPINT6_2] = 7, - [IRQ_DA850_T12CMPINT7_2] = 7, - [IRQ_DA850_T12CMPINT0_3] = 7, - [IRQ_DA850_T12CMPINT1_3] = 7, - [IRQ_DA850_T12CMPINT2_3] = 7, - [IRQ_DA850_T12CMPINT3_3] = 7, - [IRQ_DA850_T12CMPINT4_3] = 7, - [IRQ_DA850_T12CMPINT5_3] = 7, - [IRQ_DA850_T12CMPINT6_3] = 7, - [IRQ_DA850_T12CMPINT7_3] = 7, - [IRQ_DA850_RPIINT] = 7, - [IRQ_DA850_VPIFINT] = 7, - [IRQ_DA850_CCINT1] = 7, - [IRQ_DA850_CCERRINT1] = 7, - [IRQ_DA850_TCERRINT2] = 7, - [IRQ_DA850_TINTALL_3] = 7, - [IRQ_DA850_MCBSP0RINT] = 7, - [IRQ_DA850_MCBSP0XINT] = 7, - [IRQ_DA850_MCBSP1RINT] = 7, - [IRQ_DA850_MCBSP1XINT] = 7, - [IRQ_DA8XX_ARMCLKSTOPREQ] = 7, +static u8 da850_cp_intc_prios[] = { + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, }; static struct map_desc da850_io_desc[] = { @@ -739,7 +651,7 @@ static const struct davinci_soc_info davinci_soc_info_da850 = { .pinmux_pins = da850_pins, .pinmux_pins_num = ARRAY_SIZE(da850_pins), .intc_base = DA8XX_CP_INTC_BASE, - .intc_irq_prios = da850_default_priorities, + .intc_irq_prios = da850_cp_intc_prios, .intc_irq_num = DA850_N_CP_INTC_IRQ, .timer_info = &da850_timer_info, .emac_pdata = &da8xx_emac_pdata, diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 03ce5df28d87..a31f56c70d1d 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -154,69 +154,15 @@ MUX_CFG(DM355, VIN_CINH_EN, 0, 8, 3, 3, false) #endif }; -static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = { - [IRQ_DM355_CCDC_VDINT0] = 2, - [IRQ_DM355_CCDC_VDINT1] = 6, - [IRQ_DM355_CCDC_VDINT2] = 6, - [IRQ_DM355_IPIPE_HST] = 6, - [IRQ_DM355_H3AINT] = 6, - [IRQ_DM355_IPIPE_SDR] = 6, - [IRQ_DM355_IPIPEIFINT] = 6, - [IRQ_DM355_OSDINT] = 7, - [IRQ_DM355_VENCINT] = 6, - [IRQ_ASQINT] = 6, - [IRQ_IMXINT] = 6, - [IRQ_USBINT] = 4, - [IRQ_DM355_RTOINT] = 4, - [IRQ_DM355_UARTINT2] = 7, - [IRQ_DM355_TINT6] = 7, - [IRQ_CCINT0] = 5, /* dma */ - [IRQ_CCERRINT] = 5, /* dma */ - [IRQ_TCERRINT0] = 5, /* dma */ - [IRQ_TCERRINT] = 5, /* dma */ - [IRQ_DM355_SPINT2_1] = 7, - [IRQ_DM355_TINT7] = 4, - [IRQ_DM355_SDIOINT0] = 7, - [IRQ_MBXINT] = 7, - [IRQ_MBRINT] = 7, - [IRQ_MMCINT] = 7, - [IRQ_DM355_MMCINT1] = 7, - [IRQ_DM355_PWMINT3] = 7, - [IRQ_DDRINT] = 7, - [IRQ_AEMIFINT] = 7, - [IRQ_DM355_SDIOINT1] = 4, - [IRQ_TINT0_TINT12] = 2, /* clockevent */ - [IRQ_TINT0_TINT34] = 2, /* clocksource */ - [IRQ_TINT1_TINT12] = 7, /* DSP timer */ - [IRQ_TINT1_TINT34] = 7, /* system tick */ - [IRQ_PWMINT0] = 7, - [IRQ_PWMINT1] = 7, - [IRQ_PWMINT2] = 7, - [IRQ_I2C] = 3, - [IRQ_UARTINT0] = 3, - [IRQ_UARTINT1] = 3, - [IRQ_DM355_SPINT0_0] = 3, - [IRQ_DM355_SPINT0_1] = 3, - [IRQ_DM355_GPIO0] = 3, - [IRQ_DM355_GPIO1] = 7, - [IRQ_DM355_GPIO2] = 4, - [IRQ_DM355_GPIO3] = 4, - [IRQ_DM355_GPIO4] = 7, - [IRQ_DM355_GPIO5] = 7, - [IRQ_DM355_GPIO6] = 7, - [IRQ_DM355_GPIO7] = 7, - [IRQ_DM355_GPIO8] = 7, - [IRQ_DM355_GPIO9] = 7, - [IRQ_DM355_GPIOBNK0] = 7, - [IRQ_DM355_GPIOBNK1] = 7, - [IRQ_DM355_GPIOBNK2] = 7, - [IRQ_DM355_GPIOBNK3] = 7, - [IRQ_DM355_GPIOBNK4] = 7, - [IRQ_DM355_GPIOBNK5] = 7, - [IRQ_DM355_GPIOBNK6] = 7, - [IRQ_COMMTX] = 7, - [IRQ_COMMRX] = 7, - [IRQ_EMUINT] = 7, +static u8 dm355_aintc_prios[] = { + 2, 6, 6, 6, 6, 6, 6, 7, + 6, 6, 6, 4, 4, 7, 7, 5, + 5, 5, 5, 7, 4, 7, 7, 7, + 7, 7, 7, 7, 7, 4, 2, 2, + 7, 7, 7, 7, 7, 3, 3, 3, + 3, 3, 3, 7, 4, 4, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 0, 0, }; /*----------------------------------------------------------------------*/ @@ -705,7 +651,7 @@ static const struct davinci_soc_info davinci_soc_info_dm355 = { .pinmux_pins = dm355_pins, .pinmux_pins_num = ARRAY_SIZE(dm355_pins), .intc_base = DAVINCI_ARM_INTC_BASE, - .intc_irq_prios = dm355_default_priorities, + .intc_irq_prios = dm355_aintc_prios, .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm355_timer_info, .sram_dma = 0x00010000, diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 3e034f0478d2..42b2012d25cc 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -382,71 +382,15 @@ static struct platform_device dm365_mdio_device = { .resource = dm365_mdio_resources, }; -static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = { - [IRQ_VDINT0] = 2, - [IRQ_VDINT1] = 6, - [IRQ_VDINT2] = 6, - [IRQ_HISTINT] = 6, - [IRQ_H3AINT] = 6, - [IRQ_PRVUINT] = 6, - [IRQ_RSZINT] = 6, - [IRQ_DM365_INSFINT] = 7, - [IRQ_VENCINT] = 6, - [IRQ_ASQINT] = 6, - [IRQ_IMXINT] = 6, - [IRQ_DM365_IMCOPINT] = 4, - [IRQ_USBINT] = 4, - [IRQ_DM365_RTOINT] = 7, - [IRQ_DM365_TINT5] = 7, - [IRQ_DM365_TINT6] = 5, - [IRQ_CCINT0] = 5, - [IRQ_CCERRINT] = 5, - [IRQ_TCERRINT0] = 5, - [IRQ_TCERRINT] = 7, - [IRQ_PSCIN] = 4, - [IRQ_DM365_SPINT2_1] = 7, - [IRQ_DM365_TINT7] = 7, - [IRQ_DM365_SDIOINT0] = 7, - [IRQ_MBXINT] = 7, - [IRQ_MBRINT] = 7, - [IRQ_MMCINT] = 7, - [IRQ_DM365_MMCINT1] = 7, - [IRQ_DM365_PWMINT3] = 7, - [IRQ_AEMIFINT] = 2, - [IRQ_DM365_SDIOINT1] = 2, - [IRQ_TINT0_TINT12] = 7, - [IRQ_TINT0_TINT34] = 7, - [IRQ_TINT1_TINT12] = 7, - [IRQ_TINT1_TINT34] = 7, - [IRQ_PWMINT0] = 7, - [IRQ_PWMINT1] = 3, - [IRQ_PWMINT2] = 3, - [IRQ_I2C] = 3, - [IRQ_UARTINT0] = 3, - [IRQ_UARTINT1] = 3, - [IRQ_DM365_RTCINT] = 3, - [IRQ_DM365_SPIINT0_0] = 3, - [IRQ_DM365_SPIINT3_0] = 3, - [IRQ_DM365_GPIO0] = 3, - [IRQ_DM365_GPIO1] = 7, - [IRQ_DM365_GPIO2] = 4, - [IRQ_DM365_GPIO3] = 4, - [IRQ_DM365_GPIO4] = 7, - [IRQ_DM365_GPIO5] = 7, - [IRQ_DM365_GPIO6] = 7, - [IRQ_DM365_GPIO7] = 7, - [IRQ_DM365_EMAC_RXTHRESH] = 7, - [IRQ_DM365_EMAC_RXPULSE] = 7, - [IRQ_DM365_EMAC_TXPULSE] = 7, - [IRQ_DM365_EMAC_MISCPULSE] = 7, - [IRQ_DM365_GPIO12] = 7, - [IRQ_DM365_GPIO13] = 7, - [IRQ_DM365_GPIO14] = 7, - [IRQ_DM365_GPIO15] = 7, - [IRQ_DM365_KEYINT] = 7, - [IRQ_DM365_TCERRINT2] = 7, - [IRQ_DM365_TCERRINT3] = 7, - [IRQ_DM365_EMUINT] = 7, +static u8 dm365_aintc_prios[] = { + 2, 6, 6, 6, 6, 6, 6, 7, + 6, 6, 6, 4, 4, 7, 7, 5, + 5, 5, 5, 7, 4, 7, 7, 7, + 7, 7, 7, 7, 7, 2, 2, 7, + 7, 7, 7, 7, 3, 3, 3, 3, + 3, 3, 3, 3, 3, 7, 4, 4, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, }; /* Four Transfer Controllers on DM365 */ @@ -722,7 +666,7 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = { .pinmux_pins = dm365_pins, .pinmux_pins_num = ARRAY_SIZE(dm365_pins), .intc_base = DAVINCI_ARM_INTC_BASE, - .intc_irq_prios = dm365_default_priorities, + .intc_irq_prios = dm365_aintc_prios, .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm365_timer_info, .emac_pdata = &dm365_emac_pdata, diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 66bab4782c62..bf7ebdcf6c18 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -147,71 +147,15 @@ MUX_CFG(DM644X, LFLDEN, 0, 25, 1, 1, false) }; /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ -static u8 dm644x_default_priorities[DAVINCI_N_AINTC_IRQ] = { - [IRQ_VDINT0] = 2, - [IRQ_VDINT1] = 6, - [IRQ_VDINT2] = 6, - [IRQ_HISTINT] = 6, - [IRQ_H3AINT] = 6, - [IRQ_PRVUINT] = 6, - [IRQ_RSZINT] = 6, - [7] = 7, - [IRQ_VENCINT] = 6, - [IRQ_ASQINT] = 6, - [IRQ_IMXINT] = 6, - [IRQ_VLCDINT] = 6, - [IRQ_USBINT] = 4, - [IRQ_EMACINT] = 4, - [14] = 7, - [15] = 7, - [IRQ_CCINT0] = 5, /* dma */ - [IRQ_CCERRINT] = 5, /* dma */ - [IRQ_TCERRINT0] = 5, /* dma */ - [IRQ_TCERRINT] = 5, /* dma */ - [IRQ_PSCIN] = 7, - [21] = 7, - [IRQ_IDE] = 4, - [23] = 7, - [IRQ_MBXINT] = 7, - [IRQ_MBRINT] = 7, - [IRQ_MMCINT] = 7, - [IRQ_SDIOINT] = 7, - [28] = 7, - [IRQ_DDRINT] = 7, - [IRQ_AEMIFINT] = 7, - [IRQ_VLQINT] = 4, - [IRQ_TINT0_TINT12] = 2, /* clockevent */ - [IRQ_TINT0_TINT34] = 2, /* clocksource */ - [IRQ_TINT1_TINT12] = 7, /* DSP timer */ - [IRQ_TINT1_TINT34] = 7, /* system tick */ - [IRQ_PWMINT0] = 7, - [IRQ_PWMINT1] = 7, - [IRQ_PWMINT2] = 7, - [IRQ_I2C] = 3, - [IRQ_UARTINT0] = 3, - [IRQ_UARTINT1] = 3, - [IRQ_UARTINT2] = 3, - [IRQ_SPINT0] = 3, - [IRQ_SPINT1] = 3, - [45] = 7, - [IRQ_DSP2ARM0] = 4, - [IRQ_DSP2ARM1] = 4, - [IRQ_GPIO0] = 7, - [IRQ_GPIO1] = 7, - [IRQ_GPIO2] = 7, - [IRQ_GPIO3] = 7, - [IRQ_GPIO4] = 7, - [IRQ_GPIO5] = 7, - [IRQ_GPIO6] = 7, - [IRQ_GPIO7] = 7, - [IRQ_GPIOBNK0] = 7, - [IRQ_GPIOBNK1] = 7, - [IRQ_GPIOBNK2] = 7, - [IRQ_GPIOBNK3] = 7, - [IRQ_GPIOBNK4] = 7, - [IRQ_COMMTX] = 7, - [IRQ_COMMRX] = 7, - [IRQ_EMUINT] = 7, +static u8 dm644x_aintc_prios[] = { + 2, 6, 6, 6, 6, 6, 6, 7, + 6, 6, 6, 6, 4, 4, 7, 7, + 5, 5, 5, 5, 7, 7, 4, 7, + 7, 7, 7, 7, 7, 7, 7, 4, + 2, 2, 7, 7, 7, 7, 7, 3, + 3, 3, 3, 3, 3, 7, 4, 4, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, }; /*----------------------------------------------------------------------*/ @@ -646,7 +590,7 @@ static const struct davinci_soc_info davinci_soc_info_dm644x = { .pinmux_pins = dm644x_pins, .pinmux_pins_num = ARRAY_SIZE(dm644x_pins), .intc_base = DAVINCI_ARM_INTC_BASE, - .intc_irq_prios = dm644x_default_priorities, + .intc_irq_prios = dm644x_aintc_prios, .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm644x_timer_info, .emac_pdata = &dm644x_emac_pdata, diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 45efa715a2c1..64b4ae5a4202 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -146,71 +146,15 @@ MUX_CFG(DM646X, PTSIMUX_SERIAL, 0, 16, 3, 3, true) #endif }; -static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = { - [IRQ_DM646X_VP_VERTINT0] = 7, - [IRQ_DM646X_VP_VERTINT1] = 7, - [IRQ_DM646X_VP_VERTINT2] = 7, - [IRQ_DM646X_VP_VERTINT3] = 7, - [IRQ_DM646X_VP_ERRINT] = 7, - [IRQ_DM646X_RESERVED_1] = 7, - [IRQ_DM646X_RESERVED_2] = 7, - [IRQ_DM646X_WDINT] = 7, - [IRQ_DM646X_CRGENINT0] = 7, - [IRQ_DM646X_CRGENINT1] = 7, - [IRQ_DM646X_TSIFINT0] = 7, - [IRQ_DM646X_TSIFINT1] = 7, - [IRQ_DM646X_VDCEINT] = 7, - [IRQ_DM646X_USBINT] = 7, - [IRQ_DM646X_USBDMAINT] = 7, - [IRQ_DM646X_PCIINT] = 7, - [IRQ_CCINT0] = 7, /* dma */ - [IRQ_CCERRINT] = 7, /* dma */ - [IRQ_TCERRINT0] = 7, /* dma */ - [IRQ_TCERRINT] = 7, /* dma */ - [IRQ_DM646X_TCERRINT2] = 7, - [IRQ_DM646X_TCERRINT3] = 7, - [IRQ_DM646X_IDE] = 7, - [IRQ_DM646X_HPIINT] = 7, - [IRQ_DM646X_EMACRXTHINT] = 7, - [IRQ_DM646X_EMACRXINT] = 7, - [IRQ_DM646X_EMACTXINT] = 7, - [IRQ_DM646X_EMACMISCINT] = 7, - [IRQ_DM646X_MCASP0TXINT] = 7, - [IRQ_DM646X_MCASP0RXINT] = 7, - [IRQ_DM646X_RESERVED_3] = 7, - [IRQ_DM646X_MCASP1TXINT] = 7, - [IRQ_TINT0_TINT12] = 7, /* clockevent */ - [IRQ_TINT0_TINT34] = 7, /* clocksource */ - [IRQ_TINT1_TINT12] = 7, /* DSP timer */ - [IRQ_TINT1_TINT34] = 7, /* system tick */ - [IRQ_PWMINT0] = 7, - [IRQ_PWMINT1] = 7, - [IRQ_DM646X_VLQINT] = 7, - [IRQ_I2C] = 7, - [IRQ_UARTINT0] = 7, - [IRQ_UARTINT1] = 7, - [IRQ_DM646X_UARTINT2] = 7, - [IRQ_DM646X_SPINT0] = 7, - [IRQ_DM646X_SPINT1] = 7, - [IRQ_DM646X_DSP2ARMINT] = 7, - [IRQ_DM646X_RESERVED_4] = 7, - [IRQ_DM646X_PSCINT] = 7, - [IRQ_DM646X_GPIO0] = 7, - [IRQ_DM646X_GPIO1] = 7, - [IRQ_DM646X_GPIO2] = 7, - [IRQ_DM646X_GPIO3] = 7, - [IRQ_DM646X_GPIO4] = 7, - [IRQ_DM646X_GPIO5] = 7, - [IRQ_DM646X_GPIO6] = 7, - [IRQ_DM646X_GPIO7] = 7, - [IRQ_DM646X_GPIOBNK0] = 7, - [IRQ_DM646X_GPIOBNK1] = 7, - [IRQ_DM646X_GPIOBNK2] = 7, - [IRQ_DM646X_DDRINT] = 7, - [IRQ_DM646X_AEMIFINT] = 7, - [IRQ_COMMTX] = 7, - [IRQ_COMMRX] = 7, - [IRQ_EMUINT] = 7, +static u8 dm646x_aintc_prios[] = { + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, + 7, 7, 7, 7, 7, 7, 7, 7, }; /*----------------------------------------------------------------------*/ @@ -586,7 +530,7 @@ static const struct davinci_soc_info davinci_soc_info_dm646x = { .pinmux_pins = dm646x_pins, .pinmux_pins_num = ARRAY_SIZE(dm646x_pins), .intc_base = DAVINCI_ARM_INTC_BASE, - .intc_irq_prios = dm646x_default_priorities, + .intc_irq_prios = dm646x_aintc_prios, .intc_irq_num = DAVINCI_N_AINTC_IRQ, .timer_info = &dm646x_timer_info, .emac_pdata = &dm646x_emac_pdata,