| Message ID | 20190129080926.36773-21-Zhiqiang.Hou@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs | expand |
On Tue, Jan 29, 2019 at 1:40 PM Z.q. Hou <zhiqiang.hou@nxp.com> wrote: > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > As there are some Byte and Half-Work width registers in PCIe > configuration space, add Byte and Half-Word width register > accessors. > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> > --- > V3: > - No change > > .../pci/controller/mobiveil/pcie-mobiveil.h | 20 +++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h > index 81685840b378..933c2f34bc52 100644 > --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h > +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h > @@ -181,9 +181,29 @@ static inline u32 csr_readl(struct mobiveil_pcie *pcie, u32 off) > return csr_read(pcie, off, 0x4); > } > > +static inline u32 csr_readw(struct mobiveil_pcie *pcie, u32 off) > +{ > + return csr_read(pcie, off, 0x2); > +} > + > +static inline u32 csr_readb(struct mobiveil_pcie *pcie, u32 off) > +{ > + return csr_read(pcie, off, 0x1); > +} > + > static inline void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) > { > csr_write(pcie, val, off, 0x4); > } > > +static inline void csr_writew(struct mobiveil_pcie *pcie, u32 val, u32 off) > +{ > + csr_write(pcie, val, off, 0x2); > +} > + > +static inline void csr_writeb(struct mobiveil_pcie *pcie, u32 val, u32 off) > +{ > + csr_write(pcie, val, off, 0x1); > +} > + > #endif /* _PCIE_MOBIVEIL_H */ > -- > 2.17.1 > Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h index 81685840b378..933c2f34bc52 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h @@ -181,9 +181,29 @@ static inline u32 csr_readl(struct mobiveil_pcie *pcie, u32 off) return csr_read(pcie, off, 0x4); } +static inline u32 csr_readw(struct mobiveil_pcie *pcie, u32 off) +{ + return csr_read(pcie, off, 0x2); +} + +static inline u32 csr_readb(struct mobiveil_pcie *pcie, u32 off) +{ + return csr_read(pcie, off, 0x1); +} + static inline void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) { csr_write(pcie, val, off, 0x4); } +static inline void csr_writew(struct mobiveil_pcie *pcie, u32 val, u32 off) +{ + csr_write(pcie, val, off, 0x2); +} + +static inline void csr_writeb(struct mobiveil_pcie *pcie, u32 val, u32 off) +{ + csr_write(pcie, val, off, 0x1); +} + #endif /* _PCIE_MOBIVEIL_H */