diff mbox series

[i-g-t,v4,5/5] tests/pm_dc: Added test for DC6 during DPMS

Message ID 1549037582-22449-6-git-send-email-anshuman.gupta@intel.com (mailing list archive)
State New, archived
Headers show
Series DC states igt tests patch series | expand

Commit Message

Gupta, Anshuman Feb. 1, 2019, 4:13 p.m. UTC
From: Jyoti Yadav <jyoti.r.yadav@intel.com>

Added new subtest for DC6 entry during DPMS on/off cycle.
During DPMS on/off cycle DC6 counter is incremented.

v2: Renamed the subtest name.
v3: Rebased.
v4: Rebased and address review comment.

Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 tests/pm_dc.c | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Imre Deak Feb. 8, 2019, 2:53 p.m. UTC | #1
On Fri, Feb 01, 2019 at 09:43:02PM +0530, Anshuman Gupta wrote:
> From: Jyoti Yadav <jyoti.r.yadav@intel.com>
> 
> Added new subtest for DC6 entry during DPMS on/off cycle.
> During DPMS on/off cycle DC6 counter is incremented.
> 
> v2: Renamed the subtest name.
> v3: Rebased.
> v4: Rebased and address review comment.
> 
> Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  tests/pm_dc.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/tests/pm_dc.c b/tests/pm_dc.c
> index 05f1363..244665d 100644
> --- a/tests/pm_dc.c
> +++ b/tests/pm_dc.c
> @@ -241,6 +241,15 @@ int main(int argc, char *argv[])
>  		test_dc_state_dpms(&data, CHECK_DC5);
>  	}
>  
> +	igt_subtest("dc6-dpms") {
> +		/* Check DC6 counter is available for the platform.
> +		 * Skip the test if counter is not available.
> +		 */
> +		read_dc_counter(data.drm_fd, CHECK_DC6);
> +		test_dc_state_dpms(&data, CHECK_DC6);
> +		//cleanup(&data);

Some debugging left-over above. That makes me think, why do the PSR
subtests do a modeset while the dpms ones don't? I think there is no
reason to make them behave differently.

> +	}
> +
>  	igt_fixture {
>  		close(data.debugfs_fd);
>  		display_fini(&data);
> -- 
> 2.7.4
>
Gupta, Anshuman Feb. 8, 2019, 4:44 p.m. UTC | #2
On Fri, Feb 08, 2019 at 04:53:18PM +0200, Imre Deak wrote:
> On Fri, Feb 01, 2019 at 09:43:02PM +0530, Anshuman Gupta wrote:
> > From: Jyoti Yadav <jyoti.r.yadav@intel.com>
> > 
> > Added new subtest for DC6 entry during DPMS on/off cycle.
> > During DPMS on/off cycle DC6 counter is incremented.
> > 
> > v2: Renamed the subtest name.
> > v3: Rebased.
> > v4: Rebased and address review comment.
> > 
> > Signed-off-by: Jyoti Yadav <jyoti.r.yadav@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  tests/pm_dc.c | 9 +++++++++
> >  1 file changed, 9 insertions(+)
> > 
> > diff --git a/tests/pm_dc.c b/tests/pm_dc.c
> > index 05f1363..244665d 100644
> > --- a/tests/pm_dc.c
> > +++ b/tests/pm_dc.c
> > @@ -241,6 +241,15 @@ int main(int argc, char *argv[])
> >  		test_dc_state_dpms(&data, CHECK_DC5);
> >  	}
> >  
> > +	igt_subtest("dc6-dpms") {
> > +		/* Check DC6 counter is available for the platform.
> > +		 * Skip the test if counter is not available.
> > +		 */
> > +		read_dc_counter(data.drm_fd, CHECK_DC6);
> > +		test_dc_state_dpms(&data, CHECK_DC6);
> > +		//cleanup(&data);
It was not there in my original patch, it was my bad.
> 
> Some debugging left-over above. That makes me think, why do the PSR
> subtests do a modeset while the dpms ones don't? I think there is no
> reason to make them behave differently.
AFAIK PSR will get trigger after consecutive programmed idle frame.
That requires at least a flip in test, that is the reason PSR requires 
a flip to test it, while DPMS can directly turn off the display.
Please suggest if it can be done better. 
> 
> > +	}
> > +
> >  	igt_fixture {
> >  		close(data.debugfs_fd);
> >  		display_fini(&data);
> > -- 
> > 2.7.4
> >
diff mbox series

Patch

diff --git a/tests/pm_dc.c b/tests/pm_dc.c
index 05f1363..244665d 100644
--- a/tests/pm_dc.c
+++ b/tests/pm_dc.c
@@ -241,6 +241,15 @@  int main(int argc, char *argv[])
 		test_dc_state_dpms(&data, CHECK_DC5);
 	}
 
+	igt_subtest("dc6-dpms") {
+		/* Check DC6 counter is available for the platform.
+		 * Skip the test if counter is not available.
+		 */
+		read_dc_counter(data.drm_fd, CHECK_DC6);
+		test_dc_state_dpms(&data, CHECK_DC6);
+		//cleanup(&data);
+	}
+
 	igt_fixture {
 		close(data.debugfs_fd);
 		display_fini(&data);