Message ID | 20190212135154.2733-7-gabriel.fernandez@st.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | update STM32MP1 clocks | expand |
Quoting gabriel.fernandez@st.com (2019-02-12 05:51:53) > From: Gabriel Fernandez <gabriel.fernandez@st.com> > > This patch removes unnecessary CLK_DIVIDER_ALLOW_ZERO flag of > ethptp_k and ck_hse_rtc clocks. Why is it unnecessary? Please write the motivation in the commit text so we can know why things are the way they are.
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c index 863586a71d49..6c99950c6135 100644 --- a/drivers/clk/clk-stm32mp1.c +++ b/drivers/clk/clk-stm32mp1.c @@ -1958,11 +1958,10 @@ static const struct clock_config stm32mp1_clock_cfg[] = { CLK_SET_RATE_NO_REPARENT, _NO_GATE, _MMUX(M_ETHCK), - _DIV(RCC_ETHCKSELR, 4, 4, CLK_DIVIDER_ALLOW_ZERO, NULL)), + _DIV(RCC_ETHCKSELR, 4, 4, 0, NULL)), /* RTC clock */ - DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7, - CLK_DIVIDER_ALLOW_ZERO), + DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7, 0), COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_PARENT,