| Message ID | 611c942e1da6404d47cf3ff4a6bd33d7bdab4e13.1550427700.git.baruch@tkos.co.il (mailing list archive) |
|---|---|
| State | Mainlined, archived |
| Commit | bdd22a41d55bb0068c8685e28839ed9492e96aba |
| Headers | show |
| Series | arm64: dts: clearfog-gt-8k: fix SGMII PHY reset signal | expand |
On Sun, Feb 17, 2019 at 08:21:40PM +0200, Baruch Siach wrote: > The PHY reset signal goes to mpp43 on CP0. > > Reported-by: Denis Odintsov <oversun@me.com> > Signed-off-by: Baruch Siach <baruch@tkos.co.il> Fixes: babc5544c293 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal") Andrew
Hi Baruch, On dim., févr. 17 2019, Baruch Siach <baruch@tkos.co.il> wrote: > The PHY reset signal goes to mpp43 on CP0. > Applied on mvebu/fixes with the Fixes tag pointed by Andrew. Thanks, Gregory > Reported-by: Denis Odintsov <oversun@me.com> > Signed-off-by: Baruch Siach <baruch@tkos.co.il> > --- > arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts > index 5b4a9609e31f..2468762283a5 100644 > --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts > +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts > @@ -351,7 +351,7 @@ > reg = <0>; > pinctrl-names = "default"; > pinctrl-0 = <&cp0_copper_eth_phy_reset>; > - reset-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>; > + reset-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>; > reset-assert-us = <10000>; > }; > > -- > 2.20.1 >
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts index 5b4a9609e31f..2468762283a5 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts @@ -351,7 +351,7 @@ reg = <0>; pinctrl-names = "default"; pinctrl-0 = <&cp0_copper_eth_phy_reset>; - reset-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>; + reset-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; };
The PHY reset signal goes to mpp43 on CP0. Reported-by: Denis Odintsov <oversun@me.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)