| Message ID | 1550662986-40987-1-git-send-email-vladimir.murzin@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] arm64: virt: Relax GIC version check | expand |
+ Will, Catalin On Wed, 20 Feb 2019 11:43:05 +0000 Vladimir Murzin <vladimir.murzin@arm.com> wrote: > Updates to the GIC architecture allow ID_AA64PFR0_EL1.GIC to have > values other than 0 or 1. At the moment, Linux is quite strict in the > way it handles this field at early boot stage (cpufeature is fine) and > will refuse to use the system register CPU interface if it doesn't > find the value 1. > > To help backports (even though the code was correct at the time of writing) > Fixes: 021f653791ad17e03f98aaa7fb933816ae16f161 ("irqchip: gic-v3: Initial support for GICv3") > > Reported-by: Chase Conklin <Chase.Conklin@arm.com> > Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> > --- > arch/arm64/kernel/head.S | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S > index 15d79a8..eecf792 100644 > --- a/arch/arm64/kernel/head.S > +++ b/arch/arm64/kernel/head.S > @@ -539,8 +539,7 @@ set_hcr: > /* GICv3 system register access */ > mrs x0, id_aa64pfr0_el1 > ubfx x0, x0, #24, #4 > - cmp x0, #1 > - b.ne 3f > + cbz x0, 3f > > mrs_s x0, SYS_ICC_SRE_EL2 > orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1 Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Will, Catalin: It is probably too late for the merge window, but on the odd chance you could queue it as a fix... Otherwise, this will be a 5.2 candidate. Thanks, M.
On Wed, Feb 20, 2019 at 01:46:16PM +0000, Marc Zyngier wrote: > + Will, Catalin > > On Wed, 20 Feb 2019 11:43:05 +0000 > Vladimir Murzin <vladimir.murzin@arm.com> wrote: > > > Updates to the GIC architecture allow ID_AA64PFR0_EL1.GIC to have > > values other than 0 or 1. At the moment, Linux is quite strict in the > > way it handles this field at early boot stage (cpufeature is fine) and > > will refuse to use the system register CPU interface if it doesn't > > find the value 1. > > > > To help backports (even though the code was correct at the time of writing) > > Fixes: 021f653791ad17e03f98aaa7fb933816ae16f161 ("irqchip: gic-v3: Initial support for GICv3") > > > > Reported-by: Chase Conklin <Chase.Conklin@arm.com> > > Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> > > --- > > arch/arm64/kernel/head.S | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S > > index 15d79a8..eecf792 100644 > > --- a/arch/arm64/kernel/head.S > > +++ b/arch/arm64/kernel/head.S > > @@ -539,8 +539,7 @@ set_hcr: > > /* GICv3 system register access */ > > mrs x0, id_aa64pfr0_el1 > > ubfx x0, x0, #24, #4 > > - cmp x0, #1 > > - b.ne 3f > > + cbz x0, 3f > > > > mrs_s x0, SYS_ICC_SRE_EL2 > > orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1 > > Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> > > Will, Catalin: It is probably too late for the merge window, but on the > odd chance you could queue it as a fix... Otherwise, this will be a 5.2 > candidate. Sure, I'll grab it. Will
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 15d79a8..eecf792 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -539,8 +539,7 @@ set_hcr: /* GICv3 system register access */ mrs x0, id_aa64pfr0_el1 ubfx x0, x0, #24, #4 - cmp x0, #1 - b.ne 3f + cbz x0, 3f mrs_s x0, SYS_ICC_SRE_EL2 orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1
Updates to the GIC architecture allow ID_AA64PFR0_EL1.GIC to have values other than 0 or 1. At the moment, Linux is quite strict in the way it handles this field at early boot stage (cpufeature is fine) and will refuse to use the system register CPU interface if it doesn't find the value 1. To help backports (even though the code was correct at the time of writing) Fixes: 021f653791ad17e03f98aaa7fb933816ae16f161 ("irqchip: gic-v3: Initial support for GICv3") Reported-by: Chase Conklin <Chase.Conklin@arm.com> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> --- arch/arm64/kernel/head.S | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)