diff mbox series

soc: imx: Add generic i.MX8 SoC driver

Message ID 1549194583-7684-1-git-send-email-abel.vesa@nxp.com (mailing list archive)
State New, archived
Headers show
Series soc: imx: Add generic i.MX8 SoC driver | expand

Commit Message

Abel Vesa Feb. 3, 2019, 11:49 a.m. UTC
Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/soc/imx/Makefile   |   1 +
 drivers/soc/imx/soc-imx8.c | 108 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 109 insertions(+)
 create mode 100644 drivers/soc/imx/soc-imx8.c

Comments

Chris Spencer Feb. 25, 2019, 7:57 a.m. UTC | #1
On Sun, 3 Feb 2019 at 11:50, Abel Vesa <abel.vesa@nxp.com> wrote:
> Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
>
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>

Tested-by: Chris Spencer <christopher.spencer@sea.co.uk>

My patch series which adds support for the i.MX8MQ to the CAAM driver
[1] needs the SoC driver, so it would be good to get this one in.

Thanks,
Chris

[1] https://www.mail-archive.com/linux-crypto@vger.kernel.org/msg36947.html
Abel Vesa Feb. 25, 2019, 9:31 a.m. UTC | #2
On 19-02-25 07:57:22, Chris Spencer wrote:
> On Sun, 3 Feb 2019 at 11:50, Abel Vesa <abel.vesa@nxp.com> wrote:
> > Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> 
> Tested-by: Chris Spencer <christopher.spencer@sea.co.uk>
> 

I don't get it, in the RFC you said you didn't have the boards to test.
How did you test it then ? 

> My patch series which adds support for the i.MX8MQ to the CAAM driver
> [1] needs the SoC driver, so it would be good to get this one in.
> 

The SoC driver needs a little bit of rework because of the way the
revisions are detected. I'll resend this in the next couple of days.

> Thanks,
> Chris
>
Chris Spencer Feb. 25, 2019, 9:46 a.m. UTC | #3
On Mon, 25 Feb 2019 at 09:31, Abel Vesa <abel.vesa@nxp.com> wrote:
> I don't get it, in the RFC you said you didn't have the boards to test.
> How did you test it then ?

I have the i.MX8MQ-EVK. I have tested it on that, but I can't test it
on anything else using that driver (i.MX6, Layerscape).

> The SoC driver needs a little bit of rework because of the way the
> revisions are detected. I'll resend this in the next couple of days.

Ok thanks.

Chris
Stefan Agner Feb. 25, 2019, 11:33 a.m. UTC | #4
On 03.02.2019 12:49, Abel Vesa wrote:
> Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  drivers/soc/imx/Makefile   |   1 +
>  drivers/soc/imx/soc-imx8.c | 108 +++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 109 insertions(+)
>  create mode 100644 drivers/soc/imx/soc-imx8.c
> 
> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> index 506a6f3..d6b529e0 100644
> --- a/drivers/soc/imx/Makefile
> +++ b/drivers/soc/imx/Makefile
> @@ -1,2 +1,3 @@
>  obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
>  obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> +obj-$(CONFIG_ARCH_MXC) += soc-imx8.o
> diff --git a/drivers/soc/imx/soc-imx8.c b/drivers/soc/imx/soc-imx8.c
> new file mode 100644
> index 0000000..69fe04e
> --- /dev/null
> +++ b/drivers/soc/imx/soc-imx8.c
> @@ -0,0 +1,108 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2019 NXP.
> + */
> +
> +#include <linux/init.h>
> +#include <linux/io.h>
> +#include <linux/of_address.h>
> +#include <linux/slab.h>
> +#include <linux/sys_soc.h>
> +#include <linux/platform_device.h>
> +#include <linux/of.h>
> +
> +#define ANADIG_DIGPROG		0x6c
> +
> +struct imx8_soc_data {
> +	char *name;
> +	u32 (*soc_revision)(void);
> +};
> +
> +static u32 __init imx_init_revision_from_anatop(void)
> +{
> +	struct device_node *np;
> +	void __iomem *anatop_base;
> +	u32 digprog;
> +
> +	np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-anatop");
> +	anatop_base = of_iomap(np, 0);
> +	WARN_ON(!anatop_base);
> +	digprog = readl_relaxed(anatop_base + ANADIG_DIGPROG);
> +	iounmap(anatop_base);
> +
> +	/*
> +	 * Bit[7:4] is the base layer revision,
> +	 * Bit[3:0] is the metal layer revision
> +	 * e.g. 0x10 stands for Tapeout 1.0
> +	 */
> +	return digprog & 0xff;
> +}
> +
> +u32 imx8mq_soc_revision(void)

Since imx_init_revision_from_anatop is __init, you should make this
__init too.

> +{
> +	return imx_init_revision_from_anatop();
> +}
> +
> +struct imx8_soc_data imx8mq_soc_data = {
> +	.name = "i.MX8MQ",
> +	.soc_revision = imx8mq_soc_revision,
> +};

Can we make this const?

> +
> +static const struct of_device_id imx8_soc_match[] = {
> +	{ .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, },
> +	{ }
> +};
> +
> +static int __init imx8_soc_init(void)
> +{
> +	struct soc_device_attribute *soc_dev_attr;
> +	struct soc_device *soc_dev;
> +	struct device_node *root;
> +	const struct of_device_id *id;
> +	u32 soc_rev = 0;
> +	const struct imx8_soc_data *data;
> +	int ret;
> +
> +	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
> +	if (!soc_dev_attr)
> +		return -ENODEV;
> +
> +	soc_dev_attr->family = "Freescale i.MX";
> +
> +	root = of_find_node_by_path("/");
> +	ret = of_property_read_string(root, "model", &soc_dev_attr->machine);
> +	if (ret)
> +		goto free_soc;
> +
> +	id = of_match_node(imx8_soc_match, root);
> +	if (!id)
> +		goto free_soc;

In this and the error case above you also need to make sure to call
of_node_put.

--
Stefan

> +
> +	of_node_put(root);
> +
> +	data = id->data;
> +	if (data) {
> +		soc_dev_attr->soc_id = data->name;
> +		if (data->soc_revision)
> +			soc_rev = data->soc_revision();
> +	}
> +
> +	soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",
> +					   (soc_rev >> 4) & 0xf,
> +					    soc_rev & 0xf);
> +	if (!soc_dev_attr->revision)
> +		goto free_soc;
> +
> +	soc_dev = soc_device_register(soc_dev_attr);
> +	if (IS_ERR(soc_dev))
> +		goto free_rev;
> +
> +	return 0;
> +
> +free_rev:
> +	kfree(soc_dev_attr->revision);
> +free_soc:
> +	kfree(soc_dev_attr);
> +	return -ENODEV;
> +}
> +device_initcall(imx8_soc_init);
diff mbox series

Patch

diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index 506a6f3..d6b529e0 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -1,2 +1,3 @@ 
 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
 obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
+obj-$(CONFIG_ARCH_MXC) += soc-imx8.o
diff --git a/drivers/soc/imx/soc-imx8.c b/drivers/soc/imx/soc-imx8.c
new file mode 100644
index 0000000..69fe04e
--- /dev/null
+++ b/drivers/soc/imx/soc-imx8.c
@@ -0,0 +1,108 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2019 NXP.
+ */
+
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+
+#define ANADIG_DIGPROG		0x6c
+
+struct imx8_soc_data {
+	char *name;
+	u32 (*soc_revision)(void);
+};
+
+static u32 __init imx_init_revision_from_anatop(void)
+{
+	struct device_node *np;
+	void __iomem *anatop_base;
+	u32 digprog;
+
+	np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-anatop");
+	anatop_base = of_iomap(np, 0);
+	WARN_ON(!anatop_base);
+	digprog = readl_relaxed(anatop_base + ANADIG_DIGPROG);
+	iounmap(anatop_base);
+
+	/*
+	 * Bit[7:4] is the base layer revision,
+	 * Bit[3:0] is the metal layer revision
+	 * e.g. 0x10 stands for Tapeout 1.0
+	 */
+	return digprog & 0xff;
+}
+
+u32 imx8mq_soc_revision(void)
+{
+	return imx_init_revision_from_anatop();
+}
+
+struct imx8_soc_data imx8mq_soc_data = {
+	.name = "i.MX8MQ",
+	.soc_revision = imx8mq_soc_revision,
+};
+
+static const struct of_device_id imx8_soc_match[] = {
+	{ .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, },
+	{ }
+};
+
+static int __init imx8_soc_init(void)
+{
+	struct soc_device_attribute *soc_dev_attr;
+	struct soc_device *soc_dev;
+	struct device_node *root;
+	const struct of_device_id *id;
+	u32 soc_rev = 0;
+	const struct imx8_soc_data *data;
+	int ret;
+
+	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+	if (!soc_dev_attr)
+		return -ENODEV;
+
+	soc_dev_attr->family = "Freescale i.MX";
+
+	root = of_find_node_by_path("/");
+	ret = of_property_read_string(root, "model", &soc_dev_attr->machine);
+	if (ret)
+		goto free_soc;
+
+	id = of_match_node(imx8_soc_match, root);
+	if (!id)
+		goto free_soc;
+
+	of_node_put(root);
+
+	data = id->data;
+	if (data) {
+		soc_dev_attr->soc_id = data->name;
+		if (data->soc_revision)
+			soc_rev = data->soc_revision();
+	}
+
+	soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",
+					   (soc_rev >> 4) & 0xf,
+					    soc_rev & 0xf);
+	if (!soc_dev_attr->revision)
+		goto free_soc;
+
+	soc_dev = soc_device_register(soc_dev_attr);
+	if (IS_ERR(soc_dev))
+		goto free_rev;
+
+	return 0;
+
+free_rev:
+	kfree(soc_dev_attr->revision);
+free_soc:
+	kfree(soc_dev_attr);
+	return -ENODEV;
+}
+device_initcall(imx8_soc_init);