| Message ID | 20190222100613.2290-1-christopher.spencer@sea.co.uk (mailing list archive) |
|---|---|
| Headers | show |
| Series | crypto: caam - Add i.MX8MQ support | expand |
On 2/22/2019 12:07 PM, spencercw@gmail.com wrote: > From: Chris Spencer <christopher.spencer@sea.co.uk> > > This patch series adds support for the i.MX8MQ to the CAAM driver. This > is mostly adapted from corresponding changes in the NXP repo. The > patches are based on v5.0-rc7. > The code looks *very* similar to what was developed by NXP. Why have you stripped off the S-O-Bs? Horia
On Mon, 25 Feb 2019 at 14:03, Horia Geanta <horia.geanta@nxp.com> wrote: > The code looks *very* similar to what was developed by NXP. > Why have you stripped off the S-O-Bs? Hi Horia, Apologies, I was struggling to find any guidance about what to do with the tags when upstreaming changes. I will add them in the next version. Thanks, Chris
On Mon, 25 Feb 2019 at 14:17, Chris Spencer <spencercw@gmail.com> wrote: > On Mon, 25 Feb 2019 at 14:03, Horia Geanta <horia.geanta@nxp.com> wrote: > > The code looks *very* similar to what was developed by NXP. > > Why have you stripped off the S-O-Bs? > > Hi Horia, > > Apologies, I was struggling to find any guidance about what to do with > the tags when upstreaming changes. I will add them in the next > version. > > Thanks, > Chris Horia, Just want to clear this up a bit to make sure I'm doing the right thing (this is my first kernel patch so forgive my missteps). These are the origins of the patches and the SOBs I will add: 2/4 is based entirely on [1], except I have only applied the changes relevant to the i.MX8MQ. I will add: Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com> 3/4 is an amalgamation of [2], [3] and [4], as well as a fix of my own (in the downstream version of pdb.h, rsa_priv_f2_pdb and rsa_priv_f3_pdb use dma_addr_t which causes a test failure; they should be using caam_dma_addr_t). I will add: Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com> 4/4 is an amalgamation of [5], [6] and [7], lightly modified to drop the i.MX8Q bits. I will add: Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com> It's not really clear to me what the From address should be. They are all under my name in my repo, but the changes are almost entirely based on those authored by NXP, so I'm not sure whether that's ok/correct. Thanks, Chris [1] MLK-15473-1: crypto: caam: Add CAAM driver support for iMX8 soc family https://source.codeaurora.org/external/imx/linux-imx/commit/drivers/crypto/caam?h=imx_4.14.78_1.0.0_ga&id=afa53c2c96a54b4432a26372e3b5e7dbccbb9671 [2] MLK-18082: crypto: caam: Fix DMA coherency configuration https://source.codeaurora.org/external/imx/linux-imx/commit/drivers/crypto/caam?h=imx_4.14.78_1.0.0_ga&id=d07274fcddde4258e63edf2a77dc29aef19a0d27 [3] MLK-17233: Fix CAAM pointer size error for i.MX8 https://source.codeaurora.org/external/imx/linux-imx/commit/drivers/crypto/caam?h=imx_4.14.78_1.0.0_ga&id=09a35f4ff6e7a6fb93db6f0b0ec30c1c6c25df34 [4] MLK-18082: crypto: caam: Check ret value of dma_set_mask_and_coherent https://source.codeaurora.org/external/imx/linux-imx/commit/drivers/crypto/caam?h=imx_4.14.78_1.0.0_ga&id=278d4b127292943eaeb49f23d8a99598ea8954bd [5] MLK-18082: crypto: caam: Move RNG instantation https://source.codeaurora.org/external/imx/linux-imx/commit/drivers/crypto/caam?h=imx_4.14.78_1.0.0_ga&id=5fd8fe866172c38e8cd07741d98d79b995f05bc9 [6] MLK-17111-1: crypto: caam: Fix RNG instantiation retry https://source.codeaurora.org/external/imx/linux-imx/commit/drivers/crypto/caam?h=imx_4.14.78_1.0.0_ga&id=031caf182221da24cd41d4cacf4c81fe1897249f [7] MLK-17227: crypto: caam: Update CAAM driver verbosity while RNG init https://source.codeaurora.org/external/imx/linux-imx/commit/drivers/crypto/caam?h=imx_4.14.78_1.0.0_ga&id=bc328d847a575082472d7aebbfe0610c5adde32a
From: Chris Spencer <christopher.spencer@sea.co.uk> This patch series adds support for the i.MX8MQ to the CAAM driver. This is mostly adapted from corresponding changes in the NXP repo. The patches are based on v5.0-rc7. RFC for now because I do not have any other boards to test it on. Hopefully people can verify this change on other boards. The only thing that I think is potentially problematic is that the RNG is now initialised via the job ring instead of interfacing directly with the DECO. In principle, support for the i.MX8MM can be added by just checking for fsl,imx8mm everywhere we are checking for fsl,imx8mq. I left this out because there is currently no upstream support for the i.MX8MM, and I wouldn't be able to test it anyway. The i.MX8QM and i.MX8QXP will take more work to support because the driver needs to be updated to handle the SECO. I have copied the DT nodes for imx8mq.dtsi below. I will submit these separately to the imx tree if/when these changes are accepted. crypto: caam@30900000 { compatible = "fsl,sec-v4.0"; #address-cells = <0x1>; #size-cells = <0x1>; reg = <0x30900000 0x40000>; ranges = <0 0x30900000 0x40000>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; sec_jr0: jr0@1000 { compatible = "fsl,sec-v4.0-job-ring"; reg = <0x1000 0x1000>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; }; sec_jr1: jr1@2000 { compatible = "fsl,sec-v4.0-job-ring"; reg = <0x2000 0x1000>; interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; }; sec_jr2: jr2@3000 { compatible = "fsl,sec-v4.0-job-ring"; reg = <0x3000 0x1000>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; }; }; Sample boot log: [ 2.691119] caam 30900000.caam: device ID = 0x0a16040100000000 (Era 9) [ 2.697950] caam 30900000.caam: job rings = 3, qi = 0 [ 2.703645] caam_jr 30901000.jr0: Entropy delay = 3200 [ 2.709126] caam_jr 30901000.jr0: Entropy delay = 3600 [ 2.784991] caam_jr 30901000.jr0: Instantiated RNG4 SH0. [ 2.855464] caam_jr 30901000.jr0: Instantiated RNG4 SH1. [ 2.881181] alg: No test for authenc(hmac(sha224),ecb(cipher_null)) (authenc-hmac-sha224-ecb-cipher_null-caam) [ 2.891777] alg: No test for authenc(hmac(sha256),ecb(cipher_null)) (authenc-hmac-sha256-ecb-cipher_null-caam) [ 2.902371] alg: No test for authenc(hmac(md5),cbc(aes)) (authenc-hmac-md5-cbc-aes-caam) [ 2.910989] alg: No test for echainiv(authenc(hmac(md5),cbc(aes))) (echainiv-authenc-hmac-md5-cbc-aes-caam) [ 2.933251] alg: No test for echainiv(authenc(hmac(sha1),cbc(aes))) (echainiv-authenc-hmac-sha1-cbc-aes-caam) [ 2.946711] alg: No test for authenc(hmac(sha224),cbc(aes)) (authenc-hmac-sha224-cbc-aes-caam) [ 2.956107] alg: No test for echainiv(authenc(hmac(sha224),cbc(aes))) (echainiv-authenc-hmac-sha224-cbc-aes-caam) [ 2.967791] alg: No test for echainiv(authenc(hmac(sha256),cbc(aes))) (echainiv-authenc-hmac-sha256-cbc-aes-caam) [ 2.978680] alg: No test for authenc(hmac(md5),cbc(des3_ede)) (authenc-hmac-md5-cbc-des3_ede-caam) [ 2.988204] alg: No test for echainiv(authenc(hmac(md5),cbc(des3_ede))) (echainiv-authenc-hmac-md5-cbc-des3_ede-caam) [ 2.999764] alg: No test for echainiv(authenc(hmac(sha1),cbc(des3_ede))) (echainiv-authenc-hmac-sha1-cbc-des3_ede-caam) [ 3.011477] alg: No test for echainiv(authenc(hmac(sha224),cbc(des3_ede))) (echainiv-authenc-hmac-sha224-cbc-des3_ede-caam) [ 3.023583] alg: No test for echainiv(authenc(hmac(sha256),cbc(des3_ede))) (echainiv-authenc-hmac-sha256-cbc-des3_ede-caam) [ 3.035376] alg: No test for authenc(hmac(md5),cbc(des)) (authenc-hmac-md5-cbc-des-caam) [ 3.044013] alg: No test for echainiv(authenc(hmac(md5),cbc(des))) (echainiv-authenc-hmac-md5-cbc-des-caam) [ 3.054668] alg: No test for echainiv(authenc(hmac(sha1),cbc(des))) (echainiv-authenc-hmac-sha1-cbc-des-caam) [ 3.065489] alg: No test for echainiv(authenc(hmac(sha224),cbc(des))) (echainiv-authenc-hmac-sha224-cbc-des-caam) [ 3.076658] alg: No test for echainiv(authenc(hmac(sha256),cbc(des))) (echainiv-authenc-hmac-sha256-cbc-des-caam) [ 3.087528] alg: No test for authenc(hmac(md5),rfc3686(ctr(aes))) (authenc-hmac-md5-rfc3686-ctr-aes-caam) [ 3.097680] alg: No test for seqiv(authenc(hmac(md5),rfc3686(ctr(aes)))) (seqiv-authenc-hmac-md5-rfc3686-ctr-aes-caam) [ 3.109169] alg: No test for seqiv(authenc(hmac(sha1),rfc3686(ctr(aes)))) (seqiv-authenc-hmac-sha1-rfc3686-ctr-aes-caam) [ 3.120670] alg: No test for authenc(hmac(sha224),rfc3686(ctr(aes))) (authenc-hmac-sha224-rfc3686-ctr-aes-caam) [ 3.131358] alg: No test for seqiv(authenc(hmac(sha224),rfc3686(ctr(aes)))) (seqiv-authenc-hmac-sha224-rfc3686-ctr-aes-caam) [ 3.143393] alg: No test for seqiv(authenc(hmac(sha256),rfc3686(ctr(aes)))) (seqiv-authenc-hmac-sha256-rfc3686-ctr-aes-caam) [ 3.155198] caam algorithms registered in /proc/crypto [ 3.171662] caam_jr 30901000.jr0: registering rng-caam [ 3.616749] caam 30900000.caam: caam pkc algorithms registered in /proc/crypto Chris Spencer (4): crypto: caam - fix detection of i.MX8 SoC crypto: caam - do not initialise clocks on the i.MX8 crypto: caam - correct DMA address size for the i.MX8 crypto: caam - use job ring for RNG instantiation instead of DECO drivers/crypto/caam/Makefile | 2 +- drivers/crypto/caam/ctrl.c | 587 ++++++------------------------ drivers/crypto/caam/desc_constr.h | 27 +- drivers/crypto/caam/inst_rng.c | 374 +++++++++++++++++++ drivers/crypto/caam/inst_rng.h | 18 + drivers/crypto/caam/intern.h | 5 +- drivers/crypto/caam/jr.c | 19 +- drivers/crypto/caam/pdb.h | 49 +-- drivers/crypto/caam/regs.h | 21 +- 9 files changed, 575 insertions(+), 527 deletions(-) create mode 100644 drivers/crypto/caam/inst_rng.c create mode 100644 drivers/crypto/caam/inst_rng.h