| Message ID | 20181113183452.50755440078@finisterre.ee.mobilebroadband (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Applied "spi: pxa2xx: Deal with the leftover garbage in TXFIFO" to the spi tree | expand |
On Tue, Nov 13, 2018 at 8:37 PM Mark Brown <broonie@kernel.org> wrote: > There doesn't seem to be a way to empty TXFIFO on MMP2. The datasheet is > super-secret and the method described in Armada 16x manual won't work: > > "The TXFIFO and RXFIFO are cleared to 0b0 when the SSPx port is reset or > disabled (by writing a 0b0 to the <Synchronous Serial Port Enable> field > in the SSP Control Register 0)." > > # devmem 0xd4037008 # read SSSR > 0x0000F204 > # devmem 0xd4037000 32 0x07 # SSE off in SSCR0 > # devmem 0xd4037000 32 0x87 # SSE on > # devmem 0xd4037008 > 0x0000F204 > ^ TXFIFO level is still 2. Sigh. > > The OLPC 1.75 boot firmware leaves two bytes in the TXFIFO. Those are > basically throwaway bytes used in response to the messages from the EC. > The OLPC kernel copes with this by power-cycling the hardware. Perhaps > the firmware should do this instead. > > Other than that, there's not much we can do other than complain loudly > until the garbage gets drained and discard the actual data... For the > OLPC EC this will work just fine and pushing more data to TXFIFO would > break further transactions. > @@ -1078,6 +1078,20 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, Hmm... Shouldn't be enough to do this in ->setup() or even in ->probe() / ->resume()?
On Tue, Mar 19, 2019 at 11:34:40AM +0200, Andy Shevchenko wrote: > Hmm... Shouldn't be enough to do this in ->setup() or even in > ->probe() / ->resume()? Yes, probably.
On Tue, 2019-03-19 at 11:34 +0200, Andy Shevchenko wrote: > On Tue, Nov 13, 2018 at 8:37 PM Mark Brown <broonie@kernel.org> wrote: > > > There doesn't seem to be a way to empty TXFIFO on MMP2. The datasheet is > > super-secret and the method described in Armada 16x manual won't work: > > > > "The TXFIFO and RXFIFO are cleared to 0b0 when the SSPx port is reset or > > disabled (by writing a 0b0 to the <Synchronous Serial Port Enable> field > > in the SSP Control Register 0)." > > > > # devmem 0xd4037008 # read SSSR > > 0x0000F204 > > # devmem 0xd4037000 32 0x07 # SSE off in SSCR0 > > # devmem 0xd4037000 32 0x87 # SSE on > > # devmem 0xd4037008 > > 0x0000F204 > > ^ TXFIFO level is still 2. Sigh. > > > > The OLPC 1.75 boot firmware leaves two bytes in the TXFIFO. Those are > > basically throwaway bytes used in response to the messages from the EC. > > The OLPC kernel copes with this by power-cycling the hardware. Perhaps > > the firmware should do this instead. > > > > Other than that, there's not much we can do other than complain loudly > > until the garbage gets drained and discard the actual data... For the > > OLPC EC this will work just fine and pushing more data to TXFIFO would > > break further transactions. > > @@ -1078,6 +1078,20 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, > > Hmm... Shouldn't be enough to do this in ->setup() or even in > ->probe() / ->resume()? I can't see how, though. As far as I can tell there's no way to just dump bytes from the TXFIFO. In slave mode they just stay there until the master initiates a transfer. The only solution I can think of is to avoid pushing more data there until we're in sync. Lubo
On Tue, Mar 19, 2019 at 3:23 PM Lubomir Rintel <lkundrak@v3.sk> wrote: > > On Tue, 2019-03-19 at 11:34 +0200, Andy Shevchenko wrote: > > On Tue, Nov 13, 2018 at 8:37 PM Mark Brown <broonie@kernel.org> wrote: > > > > > There doesn't seem to be a way to empty TXFIFO on MMP2. The datasheet is > > > super-secret and the method described in Armada 16x manual won't work: > > > > > > "The TXFIFO and RXFIFO are cleared to 0b0 when the SSPx port is reset or > > > disabled (by writing a 0b0 to the <Synchronous Serial Port Enable> field > > > in the SSP Control Register 0)." > > > > > > # devmem 0xd4037008 # read SSSR > > > 0x0000F204 > > > # devmem 0xd4037000 32 0x07 # SSE off in SSCR0 > > > # devmem 0xd4037000 32 0x87 # SSE on > > > # devmem 0xd4037008 > > > 0x0000F204 > > > ^ TXFIFO level is still 2. Sigh. > > > > > > The OLPC 1.75 boot firmware leaves two bytes in the TXFIFO. Those are > > > basically throwaway bytes used in response to the messages from the EC. > > > The OLPC kernel copes with this by power-cycling the hardware. Perhaps > > > the firmware should do this instead. > > > > > > Other than that, there's not much we can do other than complain loudly > > > until the garbage gets drained and discard the actual data... For the > > > OLPC EC this will work just fine and pushing more data to TXFIFO would > > > break further transactions. > > > @@ -1078,6 +1078,20 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, > > > > Hmm... Shouldn't be enough to do this in ->setup() or even in > > ->probe() / ->resume()? > > I can't see how, though. As far as I can tell there's no way to just > dump bytes from the TXFIFO. In slave mode they just stay there until > the master initiates a transfer. The only solution I can think of is to > avoid pushing more data there until we're in sync. On ->probe() always start as a master in case of this hardware, drain FIFO, switch to slave. Would that work?
On Tue, 2019-03-19 at 15:48 +0200, Andy Shevchenko wrote: > On Tue, Mar 19, 2019 at 3:23 PM Lubomir Rintel <lkundrak@v3.sk> wrote: > > On Tue, 2019-03-19 at 11:34 +0200, Andy Shevchenko wrote: > > > On Tue, Nov 13, 2018 at 8:37 PM Mark Brown <broonie@kernel.org> wrote: > > > > > > > There doesn't seem to be a way to empty TXFIFO on MMP2. The datasheet is > > > > super-secret and the method described in Armada 16x manual won't work: > > > > > > > > "The TXFIFO and RXFIFO are cleared to 0b0 when the SSPx port is reset or > > > > disabled (by writing a 0b0 to the <Synchronous Serial Port Enable> field > > > > in the SSP Control Register 0)." > > > > > > > > # devmem 0xd4037008 # read SSSR > > > > 0x0000F204 > > > > # devmem 0xd4037000 32 0x07 # SSE off in SSCR0 > > > > # devmem 0xd4037000 32 0x87 # SSE on > > > > # devmem 0xd4037008 > > > > 0x0000F204 > > > > ^ TXFIFO level is still 2. Sigh. > > > > > > > > The OLPC 1.75 boot firmware leaves two bytes in the TXFIFO. Those are > > > > basically throwaway bytes used in response to the messages from the EC. > > > > The OLPC kernel copes with this by power-cycling the hardware. Perhaps > > > > the firmware should do this instead. > > > > > > > > Other than that, there's not much we can do other than complain loudly > > > > until the garbage gets drained and discard the actual data... For the > > > > OLPC EC this will work just fine and pushing more data to TXFIFO would > > > > break further transactions. > > > > @@ -1078,6 +1078,20 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, > > > > > > Hmm... Shouldn't be enough to do this in ->setup() or even in > > > ->probe() / ->resume()? > > > > I can't see how, though. As far as I can tell there's no way to just > > dump bytes from the TXFIFO. In slave mode they just stay there until > > the master initiates a transfer. The only solution I can think of is to > > avoid pushing more data there until we're in sync. > > On ->probe() always start as a master in case of this hardware, drain > FIFO, switch to slave. > Would that work? It sounds like it would. Do you object how this is currently done solely because it's ugly? Because perhaps it could be done away with completely and dealt with in firmware (see the original commit message). The firmware already needs heavy patching [1] to bring Linux up; maybe one more patch could be tolerable. Lubo
On Tue, Mar 19, 2019 at 6:26 PM Lubomir Rintel <lkundrak@v3.sk> wrote: > On Tue, 2019-03-19 at 15:48 +0200, Andy Shevchenko wrote: > > On Tue, Mar 19, 2019 at 3:23 PM Lubomir Rintel <lkundrak@v3.sk> wrote: > > > On Tue, 2019-03-19 at 11:34 +0200, Andy Shevchenko wrote: > > > > Hmm... Shouldn't be enough to do this in ->setup() or even in > > > > ->probe() / ->resume()? > > > > > > I can't see how, though. As far as I can tell there's no way to just > > > dump bytes from the TXFIFO. In slave mode they just stay there until > > > the master initiates a transfer. The only solution I can think of is to > > > avoid pushing more data there until we're in sync. > > > > On ->probe() always start as a master in case of this hardware, drain > > FIFO, switch to slave. > > Would that work? > > It sounds like it would. > > Do you object how this is currently done solely because it's ugly? Nope, my main concern that for every message we will have very particular check which, for example on our platforms, always would be fail. If SPI speed is high enough and processor is slow (talking about Intel Galileo here), it might affect performance (rather not, but still). > Because perhaps it could be done away with completely and dealt with in > firmware (see the original commit message). The firmware already needs > heavy patching [1] to bring Linux up; maybe one more patch could be > tolerable. I see. Since this patch is applied anyway, consider my message as a suggestion to improve.
Hi! > > > I can't see how, though. As far as I can tell there's no way to just > > > dump bytes from the TXFIFO. In slave mode they just stay there until > > > the master initiates a transfer. The only solution I can think of is to > > > avoid pushing more data there until we're in sync. > > > > On ->probe() always start as a master in case of this hardware, drain > > FIFO, switch to slave. > > Would that work? > > It sounds like it would. > > Do you object how this is currently done solely because it's ugly? > > Because perhaps it could be done away with completely and dealt with in > firmware (see the original commit message). The firmware already needs > heavy patching [1] to bring Linux up; maybe one more patch could be > tolerable. Lets not do that. Its somehow late to start fixing firmware at this point... Pavel
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 69b221e34b2d..e6a606354f62 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1078,6 +1078,20 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, pxa2xx_spi_write(drv_data, SSTO, chip->timeout); } + if (drv_data->ssp_type == MMP2_SSP) { + u8 tx_level = (pxa2xx_spi_read(drv_data, SSSR) + & SSSR_TFL_MASK) >> 8; + + if (tx_level) { + /* On MMP2, flipping SSE doesn't to empty TXFIFO. */ + dev_warn(&spi->dev, "%d bytes of garbage in TXFIFO!\n", + tx_level); + if (tx_level > transfer->len) + tx_level = transfer->len; + drv_data->tx += tx_level; + } + } + if (spi_controller_is_slave(master)) { while (drv_data->write(drv_data)) ;