| Message ID | 20190225020912.29120-9-wangyan.wang@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | make mt7623 clock of hdmi stable | expand |
Hi, Wangyan: On Mon, 2019-02-25 at 10:09 +0800, wangyan wang wrote: > From: chunhui dai <chunhui.dai@mediatek.com> > > We should not change the rate of parent for hdmi phy when > doing round_rate for this clock. The parent clock of hdmi > phy must be the same as it. We change it when doing set_rate > only. > > Signed-off-by: chunhui dai <chunhui.dai@mediatek.com> > Signed-off-by: wangyan wang <wangyan.wang@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 14 -------------- > drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 3 --- > drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 11 +++++++++++ > drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 14 ++++++++++++++ > 4 files changed, 25 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c > index 370309d684ec..ca8bc1489f37 100644 > --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c > @@ -15,20 +15,6 @@ static const struct phy_ops mtk_hdmi_phy_dev_ops = { > .owner = THIS_MODULE, > }; > > -long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > - unsigned long *parent_rate) > -{ > - struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); > - > - hdmi_phy->pll_rate = rate; > - if (rate <= 74250000) > - *parent_rate = rate; > - else > - *parent_rate = rate / 2; > - > - return rate; > -} > - > u32 mtk_hdmi_phy_read(struct mtk_hdmi_phy *hdmi_phy, u32 offset) > { > return readl(hdmi_phy->regs + offset); > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h > index 446e2acd1926..c6061ad15ff0 100644 > --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h > @@ -50,9 +50,6 @@ void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset, > void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset, > u32 val, u32 mask); > struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw); > -long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > - unsigned long *parent_rate); > - > extern struct platform_driver mtk_hdmi_phy_driver; > extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf; > extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf; > diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c > index 88dd9e812ca0..33893a180c2e 100644 > --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c > +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c > @@ -152,6 +152,17 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, > RG_HDMITX_DRV_IBIAS_MASK); > return 0; > } > + > +static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long *parent_rate) > +{ > + struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); > + > + hdmi_phy->pll_rate = rate; I think you don't need to save the rate into pll_rate here, pll_rate would be set in set_rate() or recalc_rate(). Regards, CK > + > + return rate; > +} > + > static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw, > unsigned long parent_rate) > { > diff --git a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c > index 63dde42521b8..3a339f516613 100644 > --- a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c > +++ b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c > @@ -285,6 +285,20 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, > return 0; > } > > +static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long *parent_rate) > +{ > + struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); > + > + hdmi_phy->pll_rate = rate; > + if (rate <= 74250000) > + *parent_rate = rate; > + else > + *parent_rate = rate / 2; > + > + return rate; > +} > + > static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw, > unsigned long parent_rate) > {
Hi, Wangyan: On Wed, 2019-03-06 at 18:13 +0800, CK Hu wrote: > Hi, Wangyan: > > On Mon, 2019-02-25 at 10:09 +0800, wangyan wang wrote: > > From: chunhui dai <chunhui.dai@mediatek.com> > > > > We should not change the rate of parent for hdmi phy when > > doing round_rate for this clock. The parent clock of hdmi > > phy must be the same as it. We change it when doing set_rate > > only. > > > > Signed-off-by: chunhui dai <chunhui.dai@mediatek.com> > > Signed-off-by: wangyan wang <wangyan.wang@mediatek.com> > > --- > > drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 14 -------------- > > drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 3 --- > > drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 11 +++++++++++ > > drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 14 ++++++++++++++ > > 4 files changed, 25 insertions(+), 17 deletions(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c > > index 370309d684ec..ca8bc1489f37 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c > > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c > > @@ -15,20 +15,6 @@ static const struct phy_ops mtk_hdmi_phy_dev_ops = { > > .owner = THIS_MODULE, > > }; > > > > -long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > > - unsigned long *parent_rate) > > -{ > > - struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); > > - > > - hdmi_phy->pll_rate = rate; > > - if (rate <= 74250000) > > - *parent_rate = rate; > > - else > > - *parent_rate = rate / 2; > > - > > - return rate; > > -} > > - > > u32 mtk_hdmi_phy_read(struct mtk_hdmi_phy *hdmi_phy, u32 offset) > > { > > return readl(hdmi_phy->regs + offset); > > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h > > index 446e2acd1926..c6061ad15ff0 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h > > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h > > @@ -50,9 +50,6 @@ void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset, > > void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset, > > u32 val, u32 mask); > > struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw); > > -long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > > - unsigned long *parent_rate); > > - > > extern struct platform_driver mtk_hdmi_phy_driver; > > extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf; > > extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf; > > diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c > > index 88dd9e812ca0..33893a180c2e 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c > > +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c > > @@ -152,6 +152,17 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, > > RG_HDMITX_DRV_IBIAS_MASK); > > return 0; > > } > > + > > +static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > > + unsigned long *parent_rate) > > +{ > > + struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); > > + > > + hdmi_phy->pll_rate = rate; > > I think you don't need to save the rate into pll_rate here, pll_rate > would be set in set_rate() or recalc_rate(). As offline discuss, you mention that this function just need to return current rate. I think you could just remove this line 'hdmi_phy->pll_rate = rate;' and return rate only. You don't need to assign hdmi_phy->pll_rate here because it would be set later in set_rate(). Regards, CK > > Regards, > CK > > > + > > + return rate; > > +} > > + > > static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw, > > unsigned long parent_rate) > > { > > diff --git a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c > > index 63dde42521b8..3a339f516613 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c > > +++ b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c > > @@ -285,6 +285,20 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, > > return 0; > > } > > > > +static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > > + unsigned long *parent_rate) > > +{ > > + struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); > > + > > + hdmi_phy->pll_rate = rate; > > + if (rate <= 74250000) > > + *parent_rate = rate; > > + else > > + *parent_rate = rate / 2; > > + > > + return rate; > > +} > > + > > static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw, > > unsigned long parent_rate) > > { >
Hi, Wangyan: On Thu, 2019-03-21 at 13:32 +0800, CK Hu wrote: > Hi, Wangyan: > > On Wed, 2019-03-06 at 18:13 +0800, CK Hu wrote: > > Hi, Wangyan: > > > > On Mon, 2019-02-25 at 10:09 +0800, wangyan wang wrote: > > > From: chunhui dai <chunhui.dai@mediatek.com> > > > > > > We should not change the rate of parent for hdmi phy when > > > doing round_rate for this clock. The parent clock of hdmi > > > phy must be the same as it. We change it when doing set_rate > > > only. > > > > > > Signed-off-by: chunhui dai <chunhui.dai@mediatek.com> > > > Signed-off-by: wangyan wang <wangyan.wang@mediatek.com> > > > --- > > > drivers/gpu/drm/mediatek/mtk_hdmi_phy.c | 14 -------------- > > > drivers/gpu/drm/mediatek/mtk_hdmi_phy.h | 3 --- > > > drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 11 +++++++++++ > > > drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 14 ++++++++++++++ > > > 4 files changed, 25 insertions(+), 17 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c > > > index 370309d684ec..ca8bc1489f37 100644 > > > --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c > > > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c > > > @@ -15,20 +15,6 @@ static const struct phy_ops mtk_hdmi_phy_dev_ops = { > > > .owner = THIS_MODULE, > > > }; > > > > > > -long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > > > - unsigned long *parent_rate) > > > -{ > > > - struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); > > > - > > > - hdmi_phy->pll_rate = rate; > > > - if (rate <= 74250000) > > > - *parent_rate = rate; > > > - else > > > - *parent_rate = rate / 2; > > > - > > > - return rate; > > > -} > > > - > > > u32 mtk_hdmi_phy_read(struct mtk_hdmi_phy *hdmi_phy, u32 offset) > > > { > > > return readl(hdmi_phy->regs + offset); > > > diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h > > > index 446e2acd1926..c6061ad15ff0 100644 > > > --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h > > > +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h > > > @@ -50,9 +50,6 @@ void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset, > > > void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset, > > > u32 val, u32 mask); > > > struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw); > > > -long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > > > - unsigned long *parent_rate); > > > - > > > extern struct platform_driver mtk_hdmi_phy_driver; > > > extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf; > > > extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf; > > > diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c > > > index 88dd9e812ca0..33893a180c2e 100644 > > > --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c > > > +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c > > > @@ -152,6 +152,17 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, > > > RG_HDMITX_DRV_IBIAS_MASK); > > > return 0; > > > } > > > + > > > +static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > > > + unsigned long *parent_rate) > > > +{ > > > + struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); > > > + > > > + hdmi_phy->pll_rate = rate; > > > > I think you don't need to save the rate into pll_rate here, pll_rate > > would be set in set_rate() or recalc_rate(). > > As offline discuss, you mention that this function just need to return > current rate. I think you could just remove this line > 'hdmi_phy->pll_rate = rate;' and return rate only. You don't need to > assign hdmi_phy->pll_rate here because it would be set later in > set_rate(). If you do not do any thing in mtk_hdmi_pll_round_rate(), I think you could just don't implement round_rate() callback function because ccf would not call round_rate() if it is not implemented. Regards, CK > > Regards, > CK > > > > > Regards, > > CK > > > > > + > > > + return rate; > > > +} > > > + > > > static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw, > > > unsigned long parent_rate) > > > { > > > diff --git a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c > > > index 63dde42521b8..3a339f516613 100644 > > > --- a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c > > > +++ b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c > > > @@ -285,6 +285,20 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, > > > return 0; > > > } > > > > > > +static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, > > > + unsigned long *parent_rate) > > > +{ > > > + struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); > > > + > > > + hdmi_phy->pll_rate = rate; > > > + if (rate <= 74250000) > > > + *parent_rate = rate; > > > + else > > > + *parent_rate = rate / 2; > > > + > > > + return rate; > > > +} > > > + > > > static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw, > > > unsigned long parent_rate) > > > { > > >
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c index 370309d684ec..ca8bc1489f37 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.c @@ -15,20 +15,6 @@ static const struct phy_ops mtk_hdmi_phy_dev_ops = { .owner = THIS_MODULE, }; -long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) -{ - struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); - - hdmi_phy->pll_rate = rate; - if (rate <= 74250000) - *parent_rate = rate; - else - *parent_rate = rate / 2; - - return rate; -} - u32 mtk_hdmi_phy_read(struct mtk_hdmi_phy *hdmi_phy, u32 offset) { return readl(hdmi_phy->regs + offset); diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h index 446e2acd1926..c6061ad15ff0 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_phy.h @@ -50,9 +50,6 @@ void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset, void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset, u32 val, u32 mask); struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw); -long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate); - extern struct platform_driver mtk_hdmi_phy_driver; extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf; extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf; diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c index 88dd9e812ca0..33893a180c2e 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c @@ -152,6 +152,17 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, RG_HDMITX_DRV_IBIAS_MASK); return 0; } + +static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); + + hdmi_phy->pll_rate = rate; + + return rate; +} + static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { diff --git a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c index 63dde42521b8..3a339f516613 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c @@ -285,6 +285,20 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, return 0; } +static long mtk_hdmi_pll_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); + + hdmi_phy->pll_rate = rate; + if (rate <= 74250000) + *parent_rate = rate; + else + *parent_rate = rate / 2; + + return rate; +} + static unsigned long mtk_hdmi_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) {