diff mbox series

[v6,07/13] drm/i915: Write HDR infoframe and send to panel

Message ID 1553078906-5991-8-git-send-email-uma.shankar@intel.com (mailing list archive)
State New, archived
Headers show
Series Add HDR Metadata Parsing and handling in DRM layer | expand

Commit Message

Shankar, Uma March 20, 2019, 10:48 a.m. UTC 
Enable writing of HDR metadata infoframe to panel.
The data will be provid by usersapace compositors, based
on blending policies and passsed to driver through a blob
property.

v2: Rebase

v3: Fixed a warning message

v4: Addressed Shashank's review comments

v5: Rebase. Added infoframe calculation in compute config.

v6: Addressed Shashank's review comment. Added HDR metadata
support from GEN10 onwards as per Shashank's recommendation.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/intel_drv.h  |  1 +
 drivers/gpu/drm/i915/intel_hdmi.c | 41 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+)

Comments

Sharma, Shashank March 29, 2019, 11:48 a.m. UTC | #1 
On 3/20/2019 4:18 PM, Uma Shankar wrote:
> Enable writing of HDR metadata infoframe to panel.
> The data will be provid by usersapace compositors, based
> on blending policies and passsed to driver through a blob
> property.
>
> v2: Rebase
>
> v3: Fixed a warning message
>
> v4: Addressed Shashank's review comments
>
> v5: Rebase. Added infoframe calculation in compute config.
>
> v6: Addressed Shashank's review comment. Added HDR metadata
> support from GEN10 onwards as per Shashank's recommendation.
>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_drv.h  |  1 +
>   drivers/gpu/drm/i915/intel_hdmi.c | 41 +++++++++++++++++++++++++++++++++++++++
>   2 files changed, 42 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index d9f188e..c6c3cc7 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1043,6 +1043,7 @@ struct intel_crtc_state {
>   		union hdmi_infoframe avi;
>   		union hdmi_infoframe spd;
>   		union hdmi_infoframe hdmi;
> +		union hdmi_infoframe drm;
>   	} infoframes;
>   
>   	/* HDMI scrambling status */
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 5f06237..e4bc7fc 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -555,6 +555,7 @@ static u32 hsw_infoframes_enabled(struct intel_encoder *encoder,
>   	HDMI_INFOFRAME_TYPE_AVI,
>   	HDMI_INFOFRAME_TYPE_SPD,
>   	HDMI_INFOFRAME_TYPE_VENDOR,
> +	HDMI_INFOFRAME_TYPE_DRM,
>   };
>   
>   u32 intel_hdmi_infoframe_enable(unsigned int type)
> @@ -777,6 +778,30 @@ void intel_read_infoframe(struct intel_encoder *encoder,
>   	return true;
>   }
>   
> +static bool
> +intel_hdmi_compute_drm_infoframe(struct intel_encoder *encoder,
> +				 struct intel_crtc_state *crtc_state,
> +				 struct drm_connector_state *conn_state)
> +{
> +	struct hdmi_drm_infoframe *frame = &crtc_state->infoframes.drm.drm;
> +	struct hdr_static_metadata *hdr_metadata;
> +	int ret;
> +
> +	hdr_metadata = (struct hdr_static_metadata *)
> +			conn_state->hdr_output_metadata_blob_ptr->data;
> +
> +	ret = drm_hdmi_infoframe_set_hdr_metadata(frame, hdr_metadata);
> +	if (ret < 0) {
> +		DRM_ERROR("couldn't set HDR metadata in infoframe\n");
> +		return false;
> +	}
> +
> +	crtc_state->infoframes.enable |=
> +		intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_DRM);
> +
> +	return true;
> +}
> +
>   static void g4x_set_infoframes(struct intel_encoder *encoder,
>   			       bool enable,
>   			       const struct intel_crtc_state *crtc_state,
> @@ -1175,6 +1200,9 @@ static void hsw_set_infoframes(struct intel_encoder *encoder,
>   	intel_write_infoframe(encoder, crtc_state,
>   			      HDMI_INFOFRAME_TYPE_VENDOR,
>   			      &crtc_state->infoframes.hdmi);
> +	intel_write_infoframe(encoder, crtc_state,

We should have a GEN check here also, else, there could be case where we 
dint compute infoframes <=10 but wrote it, which will write garbage.

- Shashank

> +			      HDMI_INFOFRAME_TYPE_DRM,
> +			      &crtc_state->infoframes.drm);
>   }
>   
>   void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable)
> @@ -2381,6 +2409,19 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>   		return -EINVAL;
>   	}
>   
> +	/*
> +	 * Support HDR Metadata from Gen10 onwards
> +	 * ToDo: Gen9 also can support HDR with LSPCON.
> +	 * Support for the same to be enabled later.
> +	 */
> +	if (INTEL_GEN(dev_priv) >= 10) {
> +		if (!intel_hdmi_compute_drm_infoframe(encoder, pipe_config,
> +						      conn_state)) {
> +			DRM_DEBUG_KMS("bad DRM infoframe\n");
> +			return -EINVAL;
> +		}
> +	}
> +
>   	return 0;
>   }
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d9f188e..c6c3cc7 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1043,6 +1043,7 @@  struct intel_crtc_state {
 		union hdmi_infoframe avi;
 		union hdmi_infoframe spd;
 		union hdmi_infoframe hdmi;
+		union hdmi_infoframe drm;
 	} infoframes;
 
 	/* HDMI scrambling status */
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 5f06237..e4bc7fc 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -555,6 +555,7 @@  static u32 hsw_infoframes_enabled(struct intel_encoder *encoder,
 	HDMI_INFOFRAME_TYPE_AVI,
 	HDMI_INFOFRAME_TYPE_SPD,
 	HDMI_INFOFRAME_TYPE_VENDOR,
+	HDMI_INFOFRAME_TYPE_DRM,
 };
 
 u32 intel_hdmi_infoframe_enable(unsigned int type)
@@ -777,6 +778,30 @@  void intel_read_infoframe(struct intel_encoder *encoder,
 	return true;
 }
 
+static bool
+intel_hdmi_compute_drm_infoframe(struct intel_encoder *encoder,
+				 struct intel_crtc_state *crtc_state,
+				 struct drm_connector_state *conn_state)
+{
+	struct hdmi_drm_infoframe *frame = &crtc_state->infoframes.drm.drm;
+	struct hdr_static_metadata *hdr_metadata;
+	int ret;
+
+	hdr_metadata = (struct hdr_static_metadata *)
+			conn_state->hdr_output_metadata_blob_ptr->data;
+
+	ret = drm_hdmi_infoframe_set_hdr_metadata(frame, hdr_metadata);
+	if (ret < 0) {
+		DRM_ERROR("couldn't set HDR metadata in infoframe\n");
+		return false;
+	}
+
+	crtc_state->infoframes.enable |=
+		intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_DRM);
+
+	return true;
+}
+
 static void g4x_set_infoframes(struct intel_encoder *encoder,
 			       bool enable,
 			       const struct intel_crtc_state *crtc_state,
@@ -1175,6 +1200,9 @@  static void hsw_set_infoframes(struct intel_encoder *encoder,
 	intel_write_infoframe(encoder, crtc_state,
 			      HDMI_INFOFRAME_TYPE_VENDOR,
 			      &crtc_state->infoframes.hdmi);
+	intel_write_infoframe(encoder, crtc_state,
+			      HDMI_INFOFRAME_TYPE_DRM,
+			      &crtc_state->infoframes.drm);
 }
 
 void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable)
@@ -2381,6 +2409,19 @@  int intel_hdmi_compute_config(struct intel_encoder *encoder,
 		return -EINVAL;
 	}
 
+	/*
+	 * Support HDR Metadata from Gen10 onwards
+	 * ToDo: Gen9 also can support HDR with LSPCON.
+	 * Support for the same to be enabled later.
+	 */
+	if (INTEL_GEN(dev_priv) >= 10) {
+		if (!intel_hdmi_compute_drm_infoframe(encoder, pipe_config,
+						      conn_state)) {
+			DRM_DEBUG_KMS("bad DRM infoframe\n");
+			return -EINVAL;
+		}
+	}
+
 	return 0;
 }