diff mbox series

[v2,2/2] ARM: dts: sun8i: a83t: Add missing CPU clock references

Message ID 20190328113159.9668-3-megous@megous.com (mailing list archive)
State New, archived
Headers show
Series ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs | expand

Commit Message

Ondřej Jirman March 28, 2019, 11:31 a.m. UTC
From: Ondrej Jirman <megous@megous.com>

A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
We can bring down any CPU in the cluster, so we need to define clock
for each CPU, so that the system knows what clock to use if the first
CPU is down.

Signed-off-by: Ondrej Jirman <megous@megous.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

Maxime Ripard April 1, 2019, 8:22 a.m. UTC | #1
Hi,

On Thu, Mar 28, 2019 at 12:31:59PM +0100, megous@megous.com wrote:
> From: Ondrej Jirman <megous@megous.com>
>
> A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
> We can bring down any CPU in the cluster, so we need to define clock
> for each CPU, so that the system knows what clock to use if the first
> CPU is down.
>
> Signed-off-by: Ondrej Jirman <megous@megous.com>
> ---
>  arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index 7a40b7d77ec0..1b0b025b9250 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -73,6 +73,8 @@
>  		};
>
>  		cpu@1 {
> +			clocks = <&ccu CLK_C0CPUX>;

Usually we'll have the compatible first

> +			clock-names = "cpu";

And that's not documented anywhere?

Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
Ondřej Jirman April 1, 2019, 11:30 a.m. UTC | #2
Hello Maxime,

On Mon, Apr 01, 2019 at 10:22:42AM +0200, Maxime Ripard wrote:
> Hi,
> 
> On Thu, Mar 28, 2019 at 12:31:59PM +0100, megous@megous.com wrote:
> > From: Ondrej Jirman <megous@megous.com>
> >
> > A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
> > We can bring down any CPU in the cluster, so we need to define clock
> > for each CPU, so that the system knows what clock to use if the first
> > CPU is down.
> >
> > Signed-off-by: Ondrej Jirman <megous@megous.com>
> > ---
> >  arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > index 7a40b7d77ec0..1b0b025b9250 100644
> > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> > @@ -73,6 +73,8 @@
> >  		};
> >
> >  		cpu@1 {
> > +			clocks = <&ccu CLK_C0CPUX>;
> 
> Usually we'll have the compatible first

I'll re-order it.

> > +			clock-names = "cpu";
> 
> And that's not documented anywhere?

Cpufreq doesn't use CPU clock names, except for the mediatek cpufreq driver.

It's not docummented explicitly, except it's used as part of examples in
bindings/opp/opp.txt.

I guess I can safely drop it, but other will probably keep using it, because
it's part of the examples.

thank you and regards,
  Ondrej

> Maxime
> 
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 7a40b7d77ec0..1b0b025b9250 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -73,6 +73,8 @@ 
 		};
 
 		cpu@1 {
+			clocks = <&ccu CLK_C0CPUX>;
+			clock-names = "cpu";
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			operating-points-v2 = <&cpu0_opp_table>;
@@ -83,6 +85,8 @@ 
 		};
 
 		cpu@2 {
+			clocks = <&ccu CLK_C0CPUX>;
+			clock-names = "cpu";
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			operating-points-v2 = <&cpu0_opp_table>;
@@ -93,6 +97,8 @@ 
 		};
 
 		cpu@3 {
+			clocks = <&ccu CLK_C0CPUX>;
+			clock-names = "cpu";
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			operating-points-v2 = <&cpu0_opp_table>;
@@ -115,6 +121,8 @@ 
 		};
 
 		cpu@101 {
+			clocks = <&ccu CLK_C1CPUX>;
+			clock-names = "cpu";
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			operating-points-v2 = <&cpu1_opp_table>;
@@ -125,6 +133,8 @@ 
 		};
 
 		cpu@102 {
+			clocks = <&ccu CLK_C1CPUX>;
+			clock-names = "cpu";
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			operating-points-v2 = <&cpu1_opp_table>;
@@ -135,6 +145,8 @@ 
 		};
 
 		cpu@103 {
+			clocks = <&ccu CLK_C1CPUX>;
+			clock-names = "cpu";
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			operating-points-v2 = <&cpu1_opp_table>;